37 lines
854 B
Makefile
37 lines
854 B
Makefile
# CC, EXT, and BUILD may be overridden by a top level makefile (e.g. for
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# cross compiling)
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CC = gcc
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EXT =
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BUILD = ./obj
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TARGET = spinsim$(EXT)
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SOURCES = spinsim.c spininterp.c spindebug.c pasmsim.c pasmdebug.c pasmsim2.c pasmdebug2.c eeprom.c debug.c gdb.c
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ifneq ($(OS),msys)
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SOURCES += conion.c
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endif
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OBJECTS = $(patsubst %,$(BUILD)/%, $(SOURCES:.c=.o))
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# I'm not sure why these linker flags were being used but the break the build on Mac OS X so I've
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# commented them out for the time being
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#LDFLAGS = -Wl,--relax -Wl,--gc-sections
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LDFLAGS =
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OPT := -O3
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CFLAGS = -c -g -Wall -Wno-format $(OPT) -D LINUX
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all: directory $(SOURCES) $(OBJECTS) Makefile
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$(CC) $(LDFLAGS) -o $(TARGET) $(OBJECTS)
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directory:
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mkdir -p $(BUILD)
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# Compile .c files into objexts .o
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$(BUILD)/%.o: %.c
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$(CC) $(CFLAGS) $< -o $@
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clean: FORCE
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rm -f *.o $(TARGET)
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FORCE:
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