648 lines
21 KiB
C
648 lines
21 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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* 2020 Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
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*/
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#if !defined(SIMDE_ARM_NEON_UZP2_H)
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#define SIMDE_ARM_NEON_UZP2_H
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#include "types.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x2_t
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simde_vuzp2_f32(simde_float32x2_t a, simde_float32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2_f32(a, b);
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#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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float32x2x2_t t = vuzp_f32(a, b);
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return t.val[1];
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#else
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simde_float32x2_private
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r_,
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a_ = simde_float32x2_to_private(a),
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b_ = simde_float32x2_to_private(b);
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#if defined(SIMDE_SHUFFLE_VECTOR_)
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r_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, b_.values, 1, 3);
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#else
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const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < halfway_point ; i++) {
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const size_t idx = i << 1;
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r_.values[ i ] = a_.values[idx | 1];
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r_.values[i + halfway_point] = b_.values[idx | 1];
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}
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#endif
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return simde_float32x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vuzp2_f32
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#define vuzp2_f32(a, b) simde_vuzp2_f32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vuzp2_s8(simde_int8x8_t a, simde_int8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2_s8(a, b);
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#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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int8x8x2_t t = vuzp_s8(a, b);
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return t.val[1];
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#else
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simde_int8x8_private
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r_,
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a_ = simde_int8x8_to_private(a),
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b_ = simde_int8x8_to_private(b);
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#if defined(SIMDE_SHUFFLE_VECTOR_)
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r_.values = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.values, b_.values, 1, 3, 5, 7, 9, 11, 13, 15);
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#else
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const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < halfway_point ; i++) {
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const size_t idx = i << 1;
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r_.values[ i ] = a_.values[idx | 1];
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r_.values[i + halfway_point] = b_.values[idx | 1];
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}
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#endif
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return simde_int8x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vuzp2_s8
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#define vuzp2_s8(a, b) simde_vuzp2_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x4_t
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simde_vuzp2_s16(simde_int16x4_t a, simde_int16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2_s16(a, b);
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#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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int16x4x2_t t = vuzp_s16(a, b);
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return t.val[1];
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#else
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simde_int16x4_private
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r_,
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a_ = simde_int16x4_to_private(a),
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b_ = simde_int16x4_to_private(b);
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#if defined(SIMDE_SHUFFLE_VECTOR_)
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r_.values = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.values, b_.values, 1, 3, 5, 7);
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#else
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const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < halfway_point ; i++) {
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const size_t idx = i << 1;
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r_.values[ i ] = a_.values[idx | 1];
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r_.values[i + halfway_point] = b_.values[idx | 1];
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}
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#endif
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return simde_int16x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vuzp2_s16
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#define vuzp2_s16(a, b) simde_vuzp2_s16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x2_t
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simde_vuzp2_s32(simde_int32x2_t a, simde_int32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2_s32(a, b);
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#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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int32x2x2_t t = vuzp_s32(a, b);
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return t.val[1];
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#else
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simde_int32x2_private
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r_,
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a_ = simde_int32x2_to_private(a),
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b_ = simde_int32x2_to_private(b);
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#if defined(SIMDE_SHUFFLE_VECTOR_)
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r_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, b_.values, 1, 3);
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#else
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const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < halfway_point ; i++) {
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const size_t idx = i << 1;
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r_.values[ i ] = a_.values[idx | 1];
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r_.values[i + halfway_point] = b_.values[idx | 1];
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}
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#endif
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return simde_int32x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vuzp2_s32
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#define vuzp2_s32(a, b) simde_vuzp2_s32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x8_t
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simde_vuzp2_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2_u8(a, b);
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#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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uint8x8x2_t t = vuzp_u8(a, b);
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return t.val[1];
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#else
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simde_uint8x8_private
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r_,
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a_ = simde_uint8x8_to_private(a),
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b_ = simde_uint8x8_to_private(b);
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#if defined(SIMDE_SHUFFLE_VECTOR_)
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r_.values = SIMDE_SHUFFLE_VECTOR_(8, 8, a_.values, b_.values, 1, 3, 5, 7, 9, 11, 13, 15);
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#else
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const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < halfway_point ; i++) {
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const size_t idx = i << 1;
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r_.values[ i ] = a_.values[idx | 1];
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r_.values[i + halfway_point] = b_.values[idx | 1];
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}
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#endif
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return simde_uint8x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vuzp2_u8
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#define vuzp2_u8(a, b) simde_vuzp2_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x4_t
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simde_vuzp2_u16(simde_uint16x4_t a, simde_uint16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2_u16(a, b);
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#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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uint16x4x2_t t = vuzp_u16(a, b);
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return t.val[1];
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#else
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simde_uint16x4_private
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r_,
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a_ = simde_uint16x4_to_private(a),
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b_ = simde_uint16x4_to_private(b);
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#if defined(SIMDE_SHUFFLE_VECTOR_)
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r_.values = SIMDE_SHUFFLE_VECTOR_(16, 8, a_.values, b_.values, 1, 3, 5, 7);
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#else
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const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < halfway_point ; i++) {
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const size_t idx = i << 1;
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r_.values[ i ] = a_.values[idx | 1];
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r_.values[i + halfway_point] = b_.values[idx | 1];
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}
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#endif
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return simde_uint16x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vuzp2_u16
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#define vuzp2_u16(a, b) simde_vuzp2_u16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x2_t
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simde_vuzp2_u32(simde_uint32x2_t a, simde_uint32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2_u32(a, b);
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#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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uint32x2x2_t t = vuzp_u32(a, b);
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return t.val[1];
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#else
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simde_uint32x2_private
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r_,
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a_ = simde_uint32x2_to_private(a),
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b_ = simde_uint32x2_to_private(b);
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#if defined(SIMDE_SHUFFLE_VECTOR_)
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r_.values = SIMDE_SHUFFLE_VECTOR_(32, 8, a_.values, b_.values, 1, 3);
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#else
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const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < halfway_point ; i++) {
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const size_t idx = i << 1;
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r_.values[ i ] = a_.values[idx | 1];
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r_.values[i + halfway_point] = b_.values[idx | 1];
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}
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#endif
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return simde_uint32x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vuzp2_u32
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#define vuzp2_u32(a, b) simde_vuzp2_u32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x4_t
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simde_vuzp2q_f32(simde_float32x4_t a, simde_float32x4_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2q_f32(a, b);
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#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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float32x4x2_t t = vuzpq_f32(a, b);
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return t.val[1];
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#else
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simde_float32x4_private
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r_,
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a_ = simde_float32x4_to_private(a),
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b_ = simde_float32x4_to_private(b);
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#if defined(SIMDE_WASM_SIMD128_NATIVE)
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r_.v128 = wasm_i32x4_shuffle(a_.v128, b_.v128, 1, 3, 5, 7);
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#elif defined(SIMDE_X86_SSE_NATIVE)
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r_.m128 = _mm_shuffle_ps(a_.m128, b_.m128, 0xdd);
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#elif defined(SIMDE_SHUFFLE_VECTOR_)
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r_.values = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.values, b_.values, 1, 3, 5, 7);
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#else
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const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < halfway_point ; i++) {
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const size_t idx = i << 1;
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r_.values[ i ] = a_.values[idx | 1];
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r_.values[i + halfway_point] = b_.values[idx | 1];
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}
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#endif
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return simde_float32x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vuzp2q_f32
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#define vuzp2q_f32(a, b) simde_vuzp2q_f32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float64x2_t
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simde_vuzp2q_f64(simde_float64x2_t a, simde_float64x2_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2q_f64(a, b);
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#elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
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return vec_mergel(a, b);
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#else
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simde_float64x2_private
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r_,
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a_ = simde_float64x2_to_private(a),
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b_ = simde_float64x2_to_private(b);
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#if defined(SIMDE_WASM_SIMD128_NATIVE)
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r_.v128 = wasm_i64x2_shuffle(a_.v128, b_.v128, 1, 3);
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#elif defined(SIMDE_X86_SSE2_NATIVE)
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r_.m128d = _mm_unpackhi_pd(a_.m128d, b_.m128d);
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#elif defined(SIMDE_SHUFFLE_VECTOR_)
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r_.values = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.values, b_.values, 1, 3);
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#else
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const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < halfway_point ; i++) {
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const size_t idx = i << 1;
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r_.values[ i ] = a_.values[idx | 1];
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r_.values[i + halfway_point] = b_.values[idx | 1];
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}
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#endif
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return simde_float64x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vuzp2q_f64
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#define vuzp2q_f64(a, b) simde_vuzp2q_f64((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x16_t
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simde_vuzp2q_s8(simde_int8x16_t a, simde_int8x16_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2q_s8(a, b);
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#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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int8x16x2_t t = vuzpq_s8(a, b);
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return t.val[1];
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#else
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simde_int8x16_private
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r_,
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a_ = simde_int8x16_to_private(a),
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b_ = simde_int8x16_to_private(b);
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#if defined(SIMDE_WASM_SIMD128_NATIVE)
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r_.v128 = wasm_i8x16_shuffle(a_.v128, b_.v128, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31);
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#elif defined(SIMDE_SHUFFLE_VECTOR_)
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r_.values = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.values, b_.values, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31);
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#else
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const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < halfway_point ; i++) {
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const size_t idx = i << 1;
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r_.values[ i ] = a_.values[idx | 1];
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r_.values[i + halfway_point] = b_.values[idx | 1];
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}
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#endif
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return simde_int8x16_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vuzp2q_s8
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#define vuzp2q_s8(a, b) simde_vuzp2q_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x8_t
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simde_vuzp2q_s16(simde_int16x8_t a, simde_int16x8_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vuzp2q_s16(a, b);
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#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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int16x8x2_t t = vuzpq_s16(a, b);
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return t.val[1];
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#else
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simde_int16x8_private
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r_,
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a_ = simde_int16x8_to_private(a),
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b_ = simde_int16x8_to_private(b);
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#if defined(SIMDE_WASM_SIMD128_NATIVE)
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r_.v128 = wasm_i16x8_shuffle(a_.v128, b_.v128, 1, 3, 5, 7, 9, 11, 13, 15);
|
|
#elif defined(SIMDE_SHUFFLE_VECTOR_)
|
|
r_.values = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.values, b_.values, 1, 3, 5, 7, 9, 11, 13, 15);
|
|
#else
|
|
const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < halfway_point ; i++) {
|
|
const size_t idx = i << 1;
|
|
r_.values[ i ] = a_.values[idx | 1];
|
|
r_.values[i + halfway_point] = b_.values[idx | 1];
|
|
}
|
|
#endif
|
|
|
|
return simde_int16x8_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
|
#undef vuzp2q_s16
|
|
#define vuzp2q_s16(a, b) simde_vuzp2q_s16((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_int32x4_t
|
|
simde_vuzp2q_s32(simde_int32x4_t a, simde_int32x4_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
|
return vuzp2q_s32(a, b);
|
|
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
int32x4x2_t t = vuzpq_s32(a, b);
|
|
return t.val[1];
|
|
#else
|
|
simde_int32x4_private
|
|
r_,
|
|
a_ = simde_int32x4_to_private(a),
|
|
b_ = simde_int32x4_to_private(b);
|
|
|
|
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_i32x4_shuffle(a_.v128, b_.v128, 1, 3, 5, 7);
|
|
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
|
r_.m128i = _mm_castps_si128(_mm_shuffle_ps(_mm_castsi128_ps(a_.m128i), _mm_castsi128_ps(b_.m128i), 0xdd));
|
|
#elif defined(SIMDE_SHUFFLE_VECTOR_)
|
|
r_.values = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.values, b_.values, 1, 3, 5, 7);
|
|
#else
|
|
const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < halfway_point ; i++) {
|
|
const size_t idx = i << 1;
|
|
r_.values[ i ] = a_.values[idx | 1];
|
|
r_.values[i + halfway_point] = b_.values[idx | 1];
|
|
}
|
|
#endif
|
|
|
|
return simde_int32x4_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
|
#undef vuzp2q_s32
|
|
#define vuzp2q_s32(a, b) simde_vuzp2q_s32((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_int64x2_t
|
|
simde_vuzp2q_s64(simde_int64x2_t a, simde_int64x2_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
|
return vuzp2q_s64(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
|
|
return vec_mergel(a, b);
|
|
#else
|
|
simde_int64x2_private
|
|
r_,
|
|
a_ = simde_int64x2_to_private(a),
|
|
b_ = simde_int64x2_to_private(b);
|
|
|
|
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_i64x2_shuffle(a_.v128, b_.v128, 1, 3);
|
|
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
|
r_.m128i = _mm_unpackhi_epi64(a_.m128i, b_.m128i);
|
|
#elif defined(SIMDE_SHUFFLE_VECTOR_)
|
|
r_.values = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.values, b_.values, 1, 3);
|
|
#else
|
|
const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < halfway_point ; i++) {
|
|
const size_t idx = i << 1;
|
|
r_.values[ i ] = a_.values[idx | 1];
|
|
r_.values[i + halfway_point] = b_.values[idx | 1];
|
|
}
|
|
#endif
|
|
|
|
return simde_int64x2_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
|
#undef vuzp2q_s64
|
|
#define vuzp2q_s64(a, b) simde_vuzp2q_s64((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_uint8x16_t
|
|
simde_vuzp2q_u8(simde_uint8x16_t a, simde_uint8x16_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
|
return vuzp2q_u8(a, b);
|
|
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
uint8x16x2_t t = vuzpq_u8(a, b);
|
|
return t.val[1];
|
|
#else
|
|
simde_uint8x16_private
|
|
r_,
|
|
a_ = simde_uint8x16_to_private(a),
|
|
b_ = simde_uint8x16_to_private(b);
|
|
|
|
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_i8x16_shuffle(a_.v128, b_.v128, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31);
|
|
#elif defined(SIMDE_SHUFFLE_VECTOR_)
|
|
r_.values = SIMDE_SHUFFLE_VECTOR_(8, 16, a_.values, b_.values, 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23, 25, 27, 29, 31);
|
|
#else
|
|
const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < halfway_point ; i++) {
|
|
const size_t idx = i << 1;
|
|
r_.values[ i ] = a_.values[idx | 1];
|
|
r_.values[i + halfway_point] = b_.values[idx | 1];
|
|
}
|
|
#endif
|
|
|
|
return simde_uint8x16_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
|
#undef vuzp2q_u8
|
|
#define vuzp2q_u8(a, b) simde_vuzp2q_u8((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_uint16x8_t
|
|
simde_vuzp2q_u16(simde_uint16x8_t a, simde_uint16x8_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
|
return vuzp2q_u16(a, b);
|
|
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
uint16x8x2_t t = vuzpq_u16(a, b);
|
|
return t.val[1];
|
|
#else
|
|
simde_uint16x8_private
|
|
r_,
|
|
a_ = simde_uint16x8_to_private(a),
|
|
b_ = simde_uint16x8_to_private(b);
|
|
|
|
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_i16x8_shuffle(a_.v128, b_.v128, 1, 3, 5, 7, 9, 11, 13, 15);
|
|
#elif defined(SIMDE_SHUFFLE_VECTOR_)
|
|
r_.values = SIMDE_SHUFFLE_VECTOR_(16, 16, a_.values, b_.values, 1, 3, 5, 7, 9, 11, 13, 15);
|
|
#else
|
|
const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < halfway_point ; i++) {
|
|
const size_t idx = i << 1;
|
|
r_.values[ i ] = a_.values[idx | 1];
|
|
r_.values[i + halfway_point] = b_.values[idx | 1];
|
|
}
|
|
#endif
|
|
|
|
return simde_uint16x8_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
|
#undef vuzp2q_u16
|
|
#define vuzp2q_u16(a, b) simde_vuzp2q_u16((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_uint32x4_t
|
|
simde_vuzp2q_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
|
return vuzp2q_u32(a, b);
|
|
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
uint32x4x2_t t = vuzpq_u32(a, b);
|
|
return t.val[1];
|
|
#else
|
|
simde_uint32x4_private
|
|
r_,
|
|
a_ = simde_uint32x4_to_private(a),
|
|
b_ = simde_uint32x4_to_private(b);
|
|
|
|
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_i32x4_shuffle(a_.v128, b_.v128, 1, 3, 5, 7);
|
|
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
|
r_.m128i = _mm_castps_si128(_mm_shuffle_ps(_mm_castsi128_ps(a_.m128i), _mm_castsi128_ps(b_.m128i), 0xdd));
|
|
#elif defined(SIMDE_SHUFFLE_VECTOR_)
|
|
r_.values = SIMDE_SHUFFLE_VECTOR_(32, 16, a_.values, b_.values, 1, 3, 5, 7);
|
|
#else
|
|
const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < halfway_point ; i++) {
|
|
const size_t idx = i << 1;
|
|
r_.values[ i ] = a_.values[idx | 1];
|
|
r_.values[i + halfway_point] = b_.values[idx | 1];
|
|
}
|
|
#endif
|
|
|
|
return simde_uint32x4_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
|
#undef vuzp2q_u32
|
|
#define vuzp2q_u32(a, b) simde_vuzp2q_u32((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_uint64x2_t
|
|
simde_vuzp2q_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
|
return vuzp2q_u64(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
|
|
return vec_mergel(a, b);
|
|
#else
|
|
simde_uint64x2_private
|
|
r_,
|
|
a_ = simde_uint64x2_to_private(a),
|
|
b_ = simde_uint64x2_to_private(b);
|
|
|
|
#if defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_i64x2_shuffle(a_.v128, b_.v128, 1, 3);
|
|
#elif defined(SIMDE_X86_SSE2_NATIVE)
|
|
r_.m128i = _mm_unpackhi_epi64(a_.m128i, b_.m128i);
|
|
#elif defined(SIMDE_SHUFFLE_VECTOR_)
|
|
r_.values = SIMDE_SHUFFLE_VECTOR_(64, 16, a_.values, b_.values, 1, 3);
|
|
#else
|
|
const size_t halfway_point = sizeof(r_.values) / sizeof(r_.values[0]) / 2;
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < halfway_point ; i++) {
|
|
const size_t idx = i << 1;
|
|
r_.values[ i ] = a_.values[idx | 1];
|
|
r_.values[i + halfway_point] = b_.values[idx | 1];
|
|
}
|
|
#endif
|
|
|
|
return simde_uint64x2_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
|
#undef vuzp2q_u64
|
|
#define vuzp2q_u64(a, b) simde_vuzp2q_u64((a), (b))
|
|
#endif
|
|
|
|
SIMDE_END_DECLS_
|
|
HEDLEY_DIAGNOSTIC_POP
|
|
|
|
#endif /* !defined(SIMDE_ARM_NEON_UZP2_H) */
|