389 lines
11 KiB
C
389 lines
11 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020-2021 Evan Nemerson <evan@nemerson.com>
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* 2020 Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
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*/
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#if !defined(SIMDE_ARM_NEON_PADD_H)
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#define SIMDE_ARM_NEON_PADD_H
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#include "add.h"
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#include "uzp1.h"
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#include "uzp2.h"
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#include "types.h"
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#include "get_lane.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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int64_t
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simde_vpaddd_s64(simde_int64x2_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddd_s64(a);
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#else
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return simde_vaddd_s64(simde_vgetq_lane_s64(a, 0), simde_vgetq_lane_s64(a, 1));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vpaddd_s64
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#define vpaddd_s64(a) simde_vpaddd_s64((a))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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uint64_t
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simde_vpaddd_u64(simde_uint64x2_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddd_u64(a);
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#else
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return simde_vaddd_u64(simde_vgetq_lane_u64(a, 0), simde_vgetq_lane_u64(a, 1));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vpaddd_u64
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#define vpaddd_u64(a) simde_vpaddd_u64((a))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float64_t
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simde_vpaddd_f64(simde_float64x2_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddd_f64(a);
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#else
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simde_float64x2_private a_ = simde_float64x2_to_private(a);
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return a_.values[0] + a_.values[1];
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vpaddd_f64
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#define vpaddd_f64(a) simde_vpaddd_f64((a))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32_t
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simde_vpadds_f32(simde_float32x2_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpadds_f32(a);
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#else
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simde_float32x2_private a_ = simde_float32x2_to_private(a);
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return a_.values[0] + a_.values[1];
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vpadds_f32
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#define vpadds_f32(a) simde_vpadds_f32((a))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x2_t
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simde_vpadd_f32(simde_float32x2_t a, simde_float32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !SIMDE_DETECT_CLANG_VERSION_NOT(9,0,0)
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return vpadd_f32(a, b);
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#else
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return simde_vadd_f32(simde_vuzp1_f32(a, b), simde_vuzp2_f32(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpadd_f32
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#define vpadd_f32(a, b) simde_vpadd_f32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vpadd_s8(simde_int8x8_t a, simde_int8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vpadd_s8(a, b);
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#else
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return simde_vadd_s8(simde_vuzp1_s8(a, b), simde_vuzp2_s8(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpadd_s8
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#define vpadd_s8(a, b) simde_vpadd_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x4_t
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simde_vpadd_s16(simde_int16x4_t a, simde_int16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vpadd_s16(a, b);
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#elif defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
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return simde_int16x4_from_m64(_mm_hadd_pi16(simde_int16x4_to_m64(a), simde_int16x4_to_m64(b)));
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#else
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return simde_vadd_s16(simde_vuzp1_s16(a, b), simde_vuzp2_s16(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpadd_s16
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#define vpadd_s16(a, b) simde_vpadd_s16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x2_t
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simde_vpadd_s32(simde_int32x2_t a, simde_int32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vpadd_s32(a, b);
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#elif defined(SIMDE_X86_SSSE3_NATIVE) && defined(SIMDE_X86_MMX_NATIVE)
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return simde_int32x2_from_m64(_mm_hadd_pi32(simde_int32x2_to_m64(a), simde_int32x2_to_m64(b)));
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#else
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return simde_vadd_s32(simde_vuzp1_s32(a, b), simde_vuzp2_s32(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpadd_s32
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#define vpadd_s32(a, b) simde_vpadd_s32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x8_t
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simde_vpadd_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vpadd_u8(a, b);
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#else
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return simde_vadd_u8(simde_vuzp1_u8(a, b), simde_vuzp2_u8(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpadd_u8
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#define vpadd_u8(a, b) simde_vpadd_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x4_t
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simde_vpadd_u16(simde_uint16x4_t a, simde_uint16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vpadd_u16(a, b);
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#else
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return simde_vadd_u16(simde_vuzp1_u16(a, b), simde_vuzp2_u16(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpadd_u16
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#define vpadd_u16(a, b) simde_vpadd_u16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x2_t
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simde_vpadd_u32(simde_uint32x2_t a, simde_uint32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vpadd_u32(a, b);
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#else
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return simde_vadd_u32(simde_vuzp1_u32(a, b), simde_vuzp2_u32(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpadd_u32
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#define vpadd_u32(a, b) simde_vpadd_u32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x4_t
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simde_vpaddq_f32(simde_float32x4_t a, simde_float32x4_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddq_f32(a, b);
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#elif defined(SIMDE_X86_SSE3_NATIVE)
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simde_float32x4_private
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r_,
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a_ = simde_float32x4_to_private(a),
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b_ = simde_float32x4_to_private(b);
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#if defined(SIMDE_X86_SSE3_NATIVE)
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r_.m128 = _mm_hadd_ps(a_.m128, b_.m128);
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#endif
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return simde_float32x4_from_private(r_);
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#else
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return simde_vaddq_f32(simde_vuzp1q_f32(a, b), simde_vuzp2q_f32(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpaddq_f32
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#define vpaddq_f32(a, b) simde_vpaddq_f32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float64x2_t
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simde_vpaddq_f64(simde_float64x2_t a, simde_float64x2_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddq_f64(a, b);
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#elif defined(SIMDE_X86_SSE3_NATIVE)
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simde_float64x2_private
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r_,
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a_ = simde_float64x2_to_private(a),
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b_ = simde_float64x2_to_private(b);
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#if defined(SIMDE_X86_SSE3_NATIVE)
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r_.m128d = _mm_hadd_pd(a_.m128d, b_.m128d);
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#endif
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return simde_float64x2_from_private(r_);
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#else
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return simde_vaddq_f64(simde_vuzp1q_f64(a, b), simde_vuzp2q_f64(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vpaddq_f64
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#define vpaddq_f64(a, b) simde_vpaddq_f64((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x16_t
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simde_vpaddq_s8(simde_int8x16_t a, simde_int8x16_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddq_s8(a, b);
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#else
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return simde_vaddq_s8(simde_vuzp1q_s8(a, b), simde_vuzp2q_s8(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpaddq_s8
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#define vpaddq_s8(a, b) simde_vpaddq_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x8_t
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simde_vpaddq_s16(simde_int16x8_t a, simde_int16x8_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddq_s16(a, b);
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#elif defined(SIMDE_X86_SSSE3_NATIVE)
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simde_int16x8_private
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r_,
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a_ = simde_int16x8_to_private(a),
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b_ = simde_int16x8_to_private(b);
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#if defined(SIMDE_X86_SSSE3_NATIVE)
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r_.m128i = _mm_hadd_epi16(a_.m128i, b_.m128i);
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#endif
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return simde_int16x8_from_private(r_);
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#else
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return simde_vaddq_s16(simde_vuzp1q_s16(a, b), simde_vuzp2q_s16(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpaddq_s16
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#define vpaddq_s16(a, b) simde_vpaddq_s16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x4_t
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simde_vpaddq_s32(simde_int32x4_t a, simde_int32x4_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddq_s32(a, b);
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#elif defined(SIMDE_X86_SSSE3_NATIVE)
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simde_int32x4_private
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r_,
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a_ = simde_int32x4_to_private(a),
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b_ = simde_int32x4_to_private(b);
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#if defined(SIMDE_X86_SSSE3_NATIVE)
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r_.m128i = _mm_hadd_epi32(a_.m128i, b_.m128i);
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#endif
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return simde_int32x4_from_private(r_);
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#else
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return simde_vaddq_s32(simde_vuzp1q_s32(a, b), simde_vuzp2q_s32(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpaddq_s32
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#define vpaddq_s32(a, b) simde_vpaddq_s32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int64x2_t
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simde_vpaddq_s64(simde_int64x2_t a, simde_int64x2_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddq_s64(a, b);
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#else
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return simde_vaddq_s64(simde_vuzp1q_s64(a, b), simde_vuzp2q_s64(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpaddq_s64
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#define vpaddq_s64(a, b) simde_vpaddq_s64((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x16_t
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simde_vpaddq_u8(simde_uint8x16_t a, simde_uint8x16_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddq_u8(a, b);
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#else
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return simde_vaddq_u8(simde_vuzp1q_u8(a, b), simde_vuzp2q_u8(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpaddq_u8
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#define vpaddq_u8(a, b) simde_vpaddq_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x8_t
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simde_vpaddq_u16(simde_uint16x8_t a, simde_uint16x8_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddq_u16(a, b);
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#else
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return simde_vaddq_u16(simde_vuzp1q_u16(a, b), simde_vuzp2q_u16(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpaddq_u16
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#define vpaddq_u16(a, b) simde_vpaddq_u16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4_t
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simde_vpaddq_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddq_u32(a, b);
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#else
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return simde_vaddq_u32(simde_vuzp1q_u32(a, b), simde_vuzp2q_u32(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpaddq_u32
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#define vpaddq_u32(a, b) simde_vpaddq_u32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint64x2_t
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simde_vpaddq_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vpaddq_u64(a, b);
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#else
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return simde_vaddq_u64(simde_vuzp1q_u64(a, b), simde_vuzp2q_u64(a, b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vpaddq_u64
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#define vpaddq_u64(a, b) simde_vpaddq_u64((a), (b))
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_PADD_H) */
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