211 lines
6.0 KiB
C
211 lines
6.0 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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* 2020 Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
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*/
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#if !defined(SIMDE_ARM_NEON_MUL_N_H)
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#define SIMDE_ARM_NEON_MUL_N_H
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#include "types.h"
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#include "mul.h"
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#include "dup_n.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x2_t
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simde_vmul_n_f32(simde_float32x2_t a, simde_float32 b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmul_n_f32(a, b);
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#else
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return simde_vmul_f32(a, simde_vdup_n_f32(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmul_n_f32
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#define vmul_n_f32(a, b) simde_vmul_n_f32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float64x1_t
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simde_vmul_n_f64(simde_float64x1_t a, simde_float64 b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vmul_n_f64(a, b);
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#else
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return simde_vmul_f64(a, simde_vdup_n_f64(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vmul_n_f64
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#define vmul_n_f64(a, b) simde_vmul_n_f64((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x4_t
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simde_vmul_n_s16(simde_int16x4_t a, int16_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmul_n_s16(a, b);
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#else
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return simde_vmul_s16(a, simde_vdup_n_s16(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmul_n_s16
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#define vmul_n_s16(a, b) simde_vmul_n_s16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x2_t
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simde_vmul_n_s32(simde_int32x2_t a, int32_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmul_n_s32(a, b);
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#else
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return simde_vmul_s32(a, simde_vdup_n_s32(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmul_n_s32
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#define vmul_n_s32(a, b) simde_vmul_n_s32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x4_t
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simde_vmul_n_u16(simde_uint16x4_t a, uint16_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmul_n_u16(a, b);
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#else
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return simde_vmul_u16(a, simde_vdup_n_u16(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmul_n_u16
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#define vmul_n_u16(a, b) simde_vmul_n_u16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x2_t
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simde_vmul_n_u32(simde_uint32x2_t a, uint32_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmul_n_u32(a, b);
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#else
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return simde_vmul_u32(a, simde_vdup_n_u32(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmul_n_u32
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#define vmul_n_u32(a, b) simde_vmul_n_u32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x4_t
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simde_vmulq_n_f32(simde_float32x4_t a, simde_float32 b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmulq_n_f32(a, b);
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#else
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return simde_vmulq_f32(a, simde_vdupq_n_f32(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmulq_n_f32
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#define vmulq_n_f32(a, b) simde_vmulq_n_f32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float64x2_t
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simde_vmulq_n_f64(simde_float64x2_t a, simde_float64 b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vmulq_n_f64(a, b);
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#else
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return simde_vmulq_f64(a, simde_vdupq_n_f64(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vmulq_n_f64
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#define vmulq_n_f64(a, b) simde_vmulq_n_f64((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x8_t
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simde_vmulq_n_s16(simde_int16x8_t a, int16_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmulq_n_s16(a, b);
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#else
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return simde_vmulq_s16(a, simde_vdupq_n_s16(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmulq_n_s16
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#define vmulq_n_s16(a, b) simde_vmulq_n_s16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x4_t
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simde_vmulq_n_s32(simde_int32x4_t a, int32_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmulq_n_s32(a, b);
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#else
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return simde_vmulq_s32(a, simde_vdupq_n_s32(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmulq_n_s32
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#define vmulq_n_s32(a, b) simde_vmulq_n_s32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x8_t
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simde_vmulq_n_u16(simde_uint16x8_t a, uint16_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmulq_n_u16(a, b);
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#else
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return simde_vmulq_u16(a, simde_vdupq_n_u16(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmulq_n_u16
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#define vmulq_n_u16(a, b) simde_vmulq_n_u16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4_t
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simde_vmulq_n_u32(simde_uint32x4_t a, uint32_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vmulq_n_u32(a, b);
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#else
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return simde_vmulq_u32(a, simde_vdupq_n_u32(b));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vmulq_n_u32
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#define vmulq_n_u32(a, b) simde_vmulq_n_u32((a), (b))
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_MUL_N_H) */
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