311 lines
10 KiB
C
311 lines
10 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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*/
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/* TODO: the 128-bit versions only require AVX-512 because of the final
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* conversions from larger types down to smaller ones. We could get
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* the same results from AVX/AVX2 instructions with some shuffling
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* to extract the low half of each input element to the low half
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* of a 256-bit vector, then cast that to a 128-bit vector. */
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#if !defined(SIMDE_ARM_NEON_HSUB_H)
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#define SIMDE_ARM_NEON_HSUB_H
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#include "subl.h"
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#include "shr_n.h"
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#include "movn.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vhsub_s8(simde_int8x8_t a, simde_int8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsub_s8(a, b);
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#else
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return simde_vmovn_s16(simde_vshrq_n_s16(simde_vsubl_s8(a, b), 1));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsub_s8
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#define vhsub_s8(a, b) simde_vhsub_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x4_t
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simde_vhsub_s16(simde_int16x4_t a, simde_int16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsub_s16(a, b);
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#else
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return simde_vmovn_s32(simde_vshrq_n_s32(simde_vsubl_s16(a, b), 1));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsub_s16
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#define vhsub_s16(a, b) simde_vhsub_s16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x2_t
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simde_vhsub_s32(simde_int32x2_t a, simde_int32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsub_s32(a, b);
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#else
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return simde_vmovn_s64(simde_vshrq_n_s64(simde_vsubl_s32(a, b), 1));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsub_s32
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#define vhsub_s32(a, b) simde_vhsub_s32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x8_t
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simde_vhsub_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsub_u8(a, b);
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#else
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return simde_vmovn_u16(simde_vshrq_n_u16(simde_vsubl_u8(a, b), 1));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsub_u8
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#define vhsub_u8(a, b) simde_vhsub_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x4_t
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simde_vhsub_u16(simde_uint16x4_t a, simde_uint16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsub_u16(a, b);
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#else
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return simde_vmovn_u32(simde_vshrq_n_u32(simde_vsubl_u16(a, b), 1));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsub_u16
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#define vhsub_u16(a, b) simde_vhsub_u16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x2_t
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simde_vhsub_u32(simde_uint32x2_t a, simde_uint32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsub_u32(a, b);
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#else
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return simde_vmovn_u64(simde_vshrq_n_u64(simde_vsubl_u32(a, b), 1));
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsub_u32
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#define vhsub_u32(a, b) simde_vhsub_u32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x16_t
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simde_vhsubq_s8(simde_int8x16_t a, simde_int8x16_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsubq_s8(a, b);
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#else
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simde_int8x16_private
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r_,
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a_ = simde_int8x16_to_private(a),
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b_ = simde_int8x16_to_private(b);
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#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE)
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r_.m128i = _mm256_cvtepi16_epi8(_mm256_srai_epi16(_mm256_sub_epi16(_mm256_cvtepi8_epi16(a_.m128i), _mm256_cvtepi8_epi16(b_.m128i)), 1));
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(int8_t, (HEDLEY_STATIC_CAST(int16_t, a_.values[i]) - HEDLEY_STATIC_CAST(int16_t, b_.values[i])) >> 1);
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}
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#endif
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return simde_int8x16_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsubq_s8
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#define vhsubq_s8(a, b) simde_vhsubq_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x8_t
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simde_vhsubq_s16(simde_int16x8_t a, simde_int16x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsubq_s16(a, b);
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#else
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simde_int16x8_private
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r_,
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a_ = simde_int16x8_to_private(a),
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b_ = simde_int16x8_to_private(b);
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#if defined(SIMDE_X86_AVX512VL_NATIVE)
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r_.m128i = _mm256_cvtepi32_epi16(_mm256_srai_epi32(_mm256_sub_epi32(_mm256_cvtepi16_epi32(a_.m128i), _mm256_cvtepi16_epi32(b_.m128i)), 1));
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(int16_t, (HEDLEY_STATIC_CAST(int32_t, a_.values[i]) - HEDLEY_STATIC_CAST(int32_t, b_.values[i])) >> 1);
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}
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#endif
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return simde_int16x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsubq_s16
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#define vhsubq_s16(a, b) simde_vhsubq_s16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x4_t
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simde_vhsubq_s32(simde_int32x4_t a, simde_int32x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsubq_s32(a, b);
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#else
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simde_int32x4_private
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r_,
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a_ = simde_int32x4_to_private(a),
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b_ = simde_int32x4_to_private(b);
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#if defined(SIMDE_X86_AVX512VL_NATIVE)
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r_.m128i = _mm256_cvtepi64_epi32(_mm256_srai_epi64(_mm256_sub_epi64(_mm256_cvtepi32_epi64(a_.m128i), _mm256_cvtepi32_epi64(b_.m128i)), 1));
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(int32_t, (HEDLEY_STATIC_CAST(int64_t, a_.values[i]) - HEDLEY_STATIC_CAST(int64_t, b_.values[i])) >> 1);
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}
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#endif
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return simde_int32x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsubq_s32
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#define vhsubq_s32(a, b) simde_vhsubq_s32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x16_t
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simde_vhsubq_u8(simde_uint8x16_t a, simde_uint8x16_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsubq_u8(a, b);
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#else
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simde_uint8x16_private
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r_,
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a_ = simde_uint8x16_to_private(a),
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b_ = simde_uint8x16_to_private(b);
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#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512BW_NATIVE)
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r_.m128i = _mm256_cvtepi16_epi8(_mm256_srli_epi16(_mm256_sub_epi16(_mm256_cvtepu8_epi16(a_.m128i), _mm256_cvtepu8_epi16(b_.m128i)), 1));
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#elif defined(SIMDE_WASM_SIMD128_NATIVE)
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v128_t lo =
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wasm_u16x8_shr(wasm_i16x8_sub(wasm_u16x8_extend_low_u8x16(a_.v128),
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wasm_u16x8_extend_low_u8x16(b_.v128)),
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1);
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v128_t hi =
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wasm_u16x8_shr(wasm_i16x8_sub(wasm_u16x8_extend_high_u8x16(a_.v128),
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wasm_u16x8_extend_high_u8x16(b_.v128)),
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1);
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r_.v128 = wasm_i8x16_shuffle(lo, hi, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20,
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22, 24, 26, 28, 30);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (HEDLEY_STATIC_CAST(uint16_t, a_.values[i]) - HEDLEY_STATIC_CAST(uint16_t, b_.values[i])) >> 1);
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}
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#endif
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return simde_uint8x16_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsubq_u8
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#define vhsubq_u8(a, b) simde_vhsubq_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x8_t
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simde_vhsubq_u16(simde_uint16x8_t a, simde_uint16x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsubq_u16(a, b);
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#else
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simde_uint16x8_private
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r_,
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a_ = simde_uint16x8_to_private(a),
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b_ = simde_uint16x8_to_private(b);
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#if defined(SIMDE_X86_AVX512VL_NATIVE)
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r_.m128i = _mm256_cvtepi32_epi16(_mm256_srli_epi32(_mm256_sub_epi32(_mm256_cvtepu16_epi32(a_.m128i), _mm256_cvtepu16_epi32(b_.m128i)), 1));
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, (HEDLEY_STATIC_CAST(uint32_t, a_.values[i]) - HEDLEY_STATIC_CAST(uint32_t, b_.values[i])) >> 1);
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}
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#endif
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return simde_uint16x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsubq_u16
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#define vhsubq_u16(a, b) simde_vhsubq_u16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x4_t
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simde_vhsubq_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vhsubq_u32(a, b);
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#else
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simde_uint32x4_private
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r_,
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a_ = simde_uint32x4_to_private(a),
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b_ = simde_uint32x4_to_private(b);
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#if defined(SIMDE_X86_AVX512VL_NATIVE)
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r_.m128i = _mm256_cvtepi64_epi32(_mm256_srli_epi64(_mm256_sub_epi64(_mm256_cvtepu32_epi64(a_.m128i), _mm256_cvtepu32_epi64(b_.m128i)), 1));
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, (HEDLEY_STATIC_CAST(uint64_t, a_.values[i]) - HEDLEY_STATIC_CAST(uint64_t, b_.values[i])) >> 1);
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}
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#endif
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return simde_uint32x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vhsubq_u32
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#define vhsubq_u32(a, b) simde_vhsubq_u32((a), (b))
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_HSUB_H) */
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