258 lines
8.7 KiB
C
258 lines
8.7 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020-2021 Evan Nemerson <evan@nemerson.com>
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* 2020 Himanshi Mathur <himanshi18037@iiitd.ac.in>
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* 2020 Hidayat Khan <huk2209@gmail.com>
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* 2021 Andrew Rodriguez <anrodriguez@linkedin.com>
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*/
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#if !defined(SIMDE_X86_AVX512_CVT_H)
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#define SIMDE_X86_AVX512_CVT_H
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#include "types.h"
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#include "mov.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m128d
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simde_mm_cvtepi64_pd (simde__m128i a) {
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#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512DQ_NATIVE)
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return _mm_cvtepi64_pd(a);
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#else
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simde__m128d_private r_;
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simde__m128i_private a_ = simde__m128i_to_private(a);
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#if defined(SIMDE_X86_SSE2_NATIVE)
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/* https://stackoverflow.com/questions/41144668/how-to-efficiently-perform-double-int64-conversions-with-sse-avx */
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__m128i xH = _mm_srai_epi32(a_.n, 16);
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#if defined(SIMDE_X86_SSE4_2_NATIVE)
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xH = _mm_blend_epi16(xH, _mm_setzero_si128(), 0x33);
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#else
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xH = _mm_and_si128(xH, _mm_set_epi16(~INT16_C(0), ~INT16_C(0), INT16_C(0), INT16_C(0), ~INT16_C(0), ~INT16_C(0), INT16_C(0), INT16_C(0)));
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#endif
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xH = _mm_add_epi64(xH, _mm_castpd_si128(_mm_set1_pd(442721857769029238784.0)));
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const __m128i e = _mm_castpd_si128(_mm_set1_pd(0x0010000000000000));
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#if defined(SIMDE_X86_SSE4_2_NATIVE)
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__m128i xL = _mm_blend_epi16(a_.n, e, 0x88);
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#else
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__m128i m = _mm_set_epi16(INT16_C(0), ~INT16_C(0), ~INT16_C(0), ~INT16_C(0), INT16_C(0), ~INT16_C(0), ~INT16_C(0), ~INT16_C(0));
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__m128i xL = _mm_or_si128(_mm_and_si128(m, a_.n), _mm_andnot_si128(m, e));
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#endif
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__m128d f = _mm_sub_pd(_mm_castsi128_pd(xH), _mm_set1_pd(442726361368656609280.0));
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return _mm_add_pd(f, _mm_castsi128_pd(xL));
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#elif defined(SIMDE_CONVERT_VECTOR_)
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SIMDE_CONVERT_VECTOR_(r_.f64, a_.i64);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.f64) / sizeof(r_.f64[0])) ; i++) {
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r_.f64[i] = HEDLEY_STATIC_CAST(simde_float64, a_.i64[i]);
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}
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#endif
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return simde__m128d_from_private(r_);
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#endif
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}
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#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
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#undef _mm_cvtepi64_pd
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#define _mm_cvtepi64_pd(a) simde_mm_cvtepi64_pd(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m128d
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simde_mm_mask_cvtepi64_pd(simde__m128d src, simde__mmask8 k, simde__m128i a) {
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#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512DQ_NATIVE)
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return _mm_mask_cvtepi64_pd(src, k, a);
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#else
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return simde_mm_mask_mov_pd(src, k, simde_mm_cvtepi64_pd(a));
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#endif
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}
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#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
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#undef _mm_mask_cvtepi64_pd
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#define _mm_mask_cvtepi64_pd(src, k, a) simde_mm_mask_cvtepi64_pd(src, k, a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m128d
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simde_mm_maskz_cvtepi64_pd(simde__mmask8 k, simde__m128i a) {
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#if defined(SIMDE_X86_AVX512VL_NATIVE) && defined(SIMDE_X86_AVX512DQ_NATIVE)
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return _mm_maskz_cvtepi64_pd(k, a);
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#else
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return simde_mm_maskz_mov_pd(k, simde_mm_cvtepi64_pd(a));
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#endif
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}
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#if defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512DQ_ENABLE_NATIVE_ALIASES)
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#undef _mm_maskz_cvtepi64_pd
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#define _mm_maskz_cvtepi64_pd(k, a) simde_mm_maskz_cvtepi64_pd(k, a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m256i
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simde_mm512_cvtepi16_epi8 (simde__m512i a) {
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#if defined(SIMDE_X86_AVX512BW_NATIVE)
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return _mm512_cvtepi16_epi8(a);
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#else
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simde__m256i_private r_;
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simde__m512i_private a_ = simde__m512i_to_private(a);
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#if defined(SIMDE_CONVERT_VECTOR_)
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SIMDE_CONVERT_VECTOR_(r_.i8, a_.i16);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.i8) / sizeof(r_.i8[0])) ; i++) {
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r_.i8[i] = HEDLEY_STATIC_CAST(int8_t, a_.i16[i]);
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}
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#endif
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return simde__m256i_from_private(r_);
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#endif
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}
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#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512DQ_ENABLE_NATIVE_ALIASES)
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#undef _mm512_cvtepi16_epi8
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#define _mm512_cvtepi16_epi8(a) simde_mm512_cvtepi16_epi8(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m256i
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simde_mm512_mask_cvtepi16_epi8 (simde__m256i src, simde__mmask32 k, simde__m512i a) {
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#if defined(SIMDE_X86_AVX512BW_NATIVE)
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return _mm512_mask_cvtepi16_epi8(src, k, a);
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#else
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return simde_mm256_mask_mov_epi8(src, k, simde_mm512_cvtepi16_epi8(a));
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#endif
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}
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#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
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#undef _mm512_mask_cvtepi16_epi8
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#define _mm512_mask_cvtepi16_epi8(src, k, a) simde_mm512_mask_cvtepi16_epi8(src, k, a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m256i
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simde_mm512_maskz_cvtepi16_epi8 (simde__mmask32 k, simde__m512i a) {
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#if defined(SIMDE_X86_AVX512BW_NATIVE)
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return _mm512_maskz_cvtepi16_epi8(k, a);
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#else
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return simde_mm256_maskz_mov_epi8(k, simde_mm512_cvtepi16_epi8(a));
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#endif
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}
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#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
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#undef _mm512_maskz_cvtepi16_epi8
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#define _mm512_maskz_cvtepi16_epi8(k, a) simde_mm512_maskz_cvtepi16_epi8(k, a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_cvtepi8_epi16 (simde__m256i a) {
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#if defined(SIMDE_X86_AVX512BW_NATIVE)
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return _mm512_cvtepi8_epi16(a);
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#else
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simde__m512i_private r_;
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simde__m256i_private a_ = simde__m256i_to_private(a);
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#if defined(SIMDE_CONVERT_VECTOR_)
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SIMDE_CONVERT_VECTOR_(r_.i16, a_.i8);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
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r_.i16[i] = a_.i8[i];
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}
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#endif
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return simde__m512i_from_private(r_);
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#endif
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}
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#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
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#undef _mm512_cvtepi8_epi16
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#define _mm512_cvtepi8_epi16(a) simde_mm512_cvtepi8_epi16(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m256i
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simde_mm512_cvtepi64_epi32 (simde__m512i a) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_cvtepi64_epi32(a);
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#else
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simde__m256i_private r_;
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simde__m512i_private a_ = simde__m512i_to_private(a);
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#if defined(SIMDE_CONVERT_VECTOR_)
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SIMDE_CONVERT_VECTOR_(r_.i32, a_.i64);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.i32) / sizeof(r_.i32[0])) ; i++) {
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r_.i32[i] = HEDLEY_STATIC_CAST(int32_t, a_.i64[i]);
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}
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#endif
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return simde__m256i_from_private(r_);
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_cvtepi64_epi32
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#define _mm512_cvtepi64_epi32(a) simde_mm512_cvtepi64_epi32(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512
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simde_mm512_cvtepu32_ps (simde__m512i a) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_cvtepu32_ps(a);
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#else
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simde__m512_private r_;
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simde__m512i_private a_ = simde__m512i_to_private(a);
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#if defined(SIMDE_X86_SSE2_NATIVE)
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for (size_t i = 0 ; i < (sizeof(r_.m128) / sizeof(r_.m128[0])) ; i++) {
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/* https://stackoverflow.com/a/34067907/501126 */
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const __m128 tmp = _mm_cvtepi32_ps(_mm_srli_epi32(a_.m128i[i], 1));
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r_.m128[i] =
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_mm_add_ps(
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_mm_add_ps(tmp, tmp),
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_mm_cvtepi32_ps(_mm_and_si128(a_.m128i[i], _mm_set1_epi32(1)))
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);
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}
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#elif defined(SIMDE_CONVERT_VECTOR_)
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SIMDE_CONVERT_VECTOR_(r_.f32, a_.u32);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
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r_.f32[i] = HEDLEY_STATIC_CAST(float, a_.u32[i]);
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}
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#endif
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return simde__m512_from_private(r_);
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_cvtepu32_epi32
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#define _mm512_cvtepu32_epi32(a) simde_mm512_cvtepu32_ps(a)
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_X86_AVX512_CVT_H) */
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