273 lines
9.4 KiB
C
273 lines
9.4 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2021 Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
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* 2021 Evan Nemerson <evan@nemerson.com>
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*/
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#if !defined(SIMDE_ARM_NEON_SRI_N_H)
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#define SIMDE_ARM_NEON_SRI_N_H
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#include "types.h"
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#include "shr_n.h"
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#include "dup_n.h"
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#include "and.h"
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#include "orr.h"
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#include "reinterpret.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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#define simde_vsrid_n_s64(a, b, n) vsrid_n_s64(a, b, n)
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#else
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#define simde_vsrid_n_s64(a, b, n) \
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HEDLEY_STATIC_CAST(int64_t, \
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simde_vsrid_n_u64(HEDLEY_STATIC_CAST(uint64_t, a), HEDLEY_STATIC_CAST(uint64_t, b), n))
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#endif
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vsrid_n_s64
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#define vsrid_n_s64(a, b, n) simde_vsrid_n_s64((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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#define simde_vsrid_n_u64(a, b, n) vsrid_n_u64(a, b, n)
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#else
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#define simde_vsrid_n_u64(a, b, n) \
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(((a & (UINT64_C(0xffffffffffffffff) >> (64 - n) << (64 - n))) | simde_vshrd_n_u64((b), (n))))
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#endif
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vsrid_n_u64
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#define vsrid_n_u64(a, b, n) simde_vsrid_n_u64((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsri_n_s8(a, b, n) vsri_n_s8((a), (b), (n))
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#else
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#define simde_vsri_n_s8(a, b, n) \
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simde_vreinterpret_s8_u8(simde_vsri_n_u8( \
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simde_vreinterpret_u8_s8((a)), simde_vreinterpret_u8_s8((b)), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsri_n_s8
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#define vsri_n_s8(a, b, n) simde_vsri_n_s8((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsri_n_u8(a, b, n) vsri_n_u8((a), (b), (n))
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#else
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#define simde_vsri_n_u8(a, b, n) \
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simde_vorr_u8( \
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simde_vand_u8((a), simde_vdup_n_u8((UINT8_C(0xff) >> (8 - n) << (8 - n)))), \
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simde_vshr_n_u8((b), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsri_n_u8
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#define vsri_n_u8(a, b, n) simde_vsri_n_u8((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsri_n_s16(a, b, n) vsri_n_s16((a), (b), (n))
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#else
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#define simde_vsri_n_s16(a, b, n) \
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simde_vreinterpret_s16_u16(simde_vsri_n_u16( \
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simde_vreinterpret_u16_s16((a)), simde_vreinterpret_u16_s16((b)), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsri_n_s16
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#define vsri_n_s16(a, b, n) simde_vsri_n_s16((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsri_n_u16(a, b, n) vsri_n_u16((a), (b), (n))
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#else
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#define simde_vsri_n_u16(a, b, n) \
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simde_vorr_u16( \
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simde_vand_u16((a), simde_vdup_n_u16((UINT16_C(0xffff) >> (16 - n) << (16 - n)))), \
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simde_vshr_n_u16((b), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsri_n_u16
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#define vsri_n_u16(a, b, n) simde_vsri_n_u16((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsri_n_s32(a, b, n) vsri_n_s32((a), (b), (n))
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#else
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#define simde_vsri_n_s32(a, b, n) \
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simde_vreinterpret_s32_u32(simde_vsri_n_u32( \
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simde_vreinterpret_u32_s32((a)), simde_vreinterpret_u32_s32((b)), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsri_n_s32
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#define vsri_n_s32(a, b, n) simde_vsri_n_s32((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsri_n_u32(a, b, n) vsri_n_u32((a), (b), (n))
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#else
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#define simde_vsri_n_u32(a, b, n) \
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simde_vorr_u32( \
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simde_vand_u32((a), \
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simde_vdup_n_u32((UINT32_C(0xffffffff) >> (32 - n) << (32 - n)))), \
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simde_vshr_n_u32((b), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsri_n_u32
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#define vsri_n_u32(a, b, n) simde_vsri_n_u32((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsri_n_s64(a, b, n) vsri_n_s64((a), (b), (n))
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#else
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#define simde_vsri_n_s64(a, b, n) \
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simde_vreinterpret_s64_u64(simde_vsri_n_u64( \
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simde_vreinterpret_u64_s64((a)), simde_vreinterpret_u64_s64((b)), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsri_n_s64
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#define vsri_n_s64(a, b, n) simde_vsri_n_s64((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsri_n_u64(a, b, n) vsri_n_u64((a), (b), (n))
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#else
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#define simde_vsri_n_u64(a, b, n) \
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simde_vorr_u64( \
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simde_vand_u64((a), simde_vdup_n_u64( \
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(UINT64_C(0xffffffffffffffff) >> (64 - n) << (64 - n)))), \
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simde_vshr_n_u64((b), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsri_n_u64
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#define vsri_n_u64(a, b, n) simde_vsri_n_u64((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsriq_n_s8(a, b, n) vsriq_n_s8((a), (b), (n))
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#else
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#define simde_vsriq_n_s8(a, b, n) \
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simde_vreinterpretq_s8_u8(simde_vsriq_n_u8( \
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simde_vreinterpretq_u8_s8((a)), simde_vreinterpretq_u8_s8((b)), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsriq_n_s8
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#define vsriq_n_s8(a, b, n) simde_vsriq_n_s8((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsriq_n_u8(a, b, n) vsriq_n_u8((a), (b), (n))
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#else
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#define simde_vsriq_n_u8(a, b, n) \
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simde_vorrq_u8( \
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simde_vandq_u8((a), simde_vdupq_n_u8((UINT8_C(0xff) >> (8 - n) << (8 - n)))), \
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simde_vshrq_n_u8((b), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsriq_n_u8
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#define vsriq_n_u8(a, b, n) simde_vsriq_n_u8((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsriq_n_s16(a, b, n) vsriq_n_s16((a), (b), (n))
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#else
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#define simde_vsriq_n_s16(a, b, n) \
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simde_vreinterpretq_s16_u16(simde_vsriq_n_u16( \
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simde_vreinterpretq_u16_s16((a)), simde_vreinterpretq_u16_s16((b)), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsriq_n_s16
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#define vsriq_n_s16(a, b, n) simde_vsriq_n_s16((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsriq_n_u16(a, b, n) vsriq_n_u16((a), (b), (n))
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#else
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#define simde_vsriq_n_u16(a, b, n) \
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simde_vorrq_u16( \
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simde_vandq_u16((a), simde_vdupq_n_u16((UINT16_C(0xffff) >> (16 - n) << (16 - n)))), \
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simde_vshrq_n_u16((b), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsriq_n_u16
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#define vsriq_n_u16(a, b, n) simde_vsriq_n_u16((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsriq_n_s32(a, b, n) vsriq_n_s32((a), (b), (n))
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#else
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#define simde_vsriq_n_s32(a, b, n) \
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simde_vreinterpretq_s32_u32(simde_vsriq_n_u32( \
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simde_vreinterpretq_u32_s32((a)), simde_vreinterpretq_u32_s32((b)), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsriq_n_s32
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#define vsriq_n_s32(a, b, n) simde_vsriq_n_s32((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsriq_n_u32(a, b, n) vsriq_n_u32((a), (b), (n))
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#else
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#define simde_vsriq_n_u32(a, b, n) \
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simde_vorrq_u32( \
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simde_vandq_u32((a), \
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simde_vdupq_n_u32((UINT32_C(0xffffffff) >> (32 - n) << (32 - n)))), \
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simde_vshrq_n_u32((b), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsriq_n_u32
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#define vsriq_n_u32(a, b, n) simde_vsriq_n_u32((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsriq_n_s64(a, b, n) vsriq_n_s64((a), (b), (n))
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#else
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#define simde_vsriq_n_s64(a, b, n) \
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simde_vreinterpretq_s64_u64(simde_vsriq_n_u64( \
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simde_vreinterpretq_u64_s64((a)), simde_vreinterpretq_u64_s64((b)), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsriq_n_s64
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#define vsriq_n_s64(a, b, n) simde_vsriq_n_s64((a), (b), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vsriq_n_u64(a, b, n) vsriq_n_u64((a), (b), (n))
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#else
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#define simde_vsriq_n_u64(a, b, n) \
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simde_vorrq_u64( \
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simde_vandq_u64((a), simde_vdupq_n_u64( \
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(UINT64_C(0xffffffffffffffff) >> (64 - n) << (64 - n)))), \
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simde_vshrq_n_u64((b), (n)))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vsriq_n_u64
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#define vsriq_n_u64(a, b, n) simde_vsriq_n_u64((a), (b), (n))
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_SRI_N_H) */
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