745 lines
21 KiB
C
745 lines
21 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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*/
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#if !defined(SIMDE_ARM_NEON_ADD_H)
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#define SIMDE_ARM_NEON_ADD_H
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#include "types.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float16
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simde_vaddh_f16(simde_float16 a, simde_float16 b) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
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return vaddh_f16(a, b);
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#else
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simde_float32 af = simde_float16_to_float32(a);
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simde_float32 bf = simde_float16_to_float32(b);
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return simde_float16_from_float32(af + bf);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vaddh_f16
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#define vaddh_f16(a, b) simde_vaddh_f16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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int64_t
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simde_vaddd_s64(int64_t a, int64_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vaddd_s64(a, b);
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#else
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return a + b;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vaddd_s64
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#define vaddd_s64(a, b) simde_vaddd_s64((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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uint64_t
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simde_vaddd_u64(uint64_t a, uint64_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vaddd_u64(a, b);
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#else
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return a + b;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vaddd_u64
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#define vaddd_u64(a, b) simde_vaddd_u64((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float16x4_t
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simde_vadd_f16(simde_float16x4_t a, simde_float16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
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return vadd_f16(a, b);
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#else
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simde_float16x4_private
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r_,
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a_ = simde_float16x4_to_private(a),
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b_ = simde_float16x4_to_private(b);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = simde_vaddh_f16(a_.values[i], b_.values[i]);
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}
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return simde_float16x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vadd_f16
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#define vadd_f16(a, b) simde_vadd_f16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x2_t
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simde_vadd_f32(simde_float32x2_t a, simde_float32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vadd_f32(a, b);
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#else
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simde_float32x2_private
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r_,
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a_ = simde_float32x2_to_private(a),
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b_ = simde_float32x2_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = a_.values + b_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = a_.values[i] + b_.values[i];
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}
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#endif
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return simde_float32x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vadd_f32
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#define vadd_f32(a, b) simde_vadd_f32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float64x1_t
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simde_vadd_f64(simde_float64x1_t a, simde_float64x1_t b) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vadd_f64(a, b);
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#else
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simde_float64x1_private
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r_,
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a_ = simde_float64x1_to_private(a),
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b_ = simde_float64x1_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = a_.values + b_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = a_.values[i] + b_.values[i];
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}
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#endif
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return simde_float64x1_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vadd_f64
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#define vadd_f64(a, b) simde_vadd_f64((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vadd_s8(simde_int8x8_t a, simde_int8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vadd_s8(a, b);
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#else
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simde_int8x8_private
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r_,
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a_ = simde_int8x8_to_private(a),
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b_ = simde_int8x8_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = a_.values + b_.values;
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#elif defined(SIMDE_X86_MMX_NATIVE)
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r_.m64 = _mm_add_pi8(a_.m64, b_.m64);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = a_.values[i] + b_.values[i];
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}
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#endif
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return simde_int8x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vadd_s8
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#define vadd_s8(a, b) simde_vadd_s8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x4_t
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simde_vadd_s16(simde_int16x4_t a, simde_int16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vadd_s16(a, b);
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#else
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simde_int16x4_private
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r_,
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a_ = simde_int16x4_to_private(a),
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b_ = simde_int16x4_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = a_.values + b_.values;
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#elif defined(SIMDE_X86_MMX_NATIVE)
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r_.m64 = _mm_add_pi16(a_.m64, b_.m64);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = a_.values[i] + b_.values[i];
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}
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#endif
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return simde_int16x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vadd_s16
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#define vadd_s16(a, b) simde_vadd_s16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x2_t
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simde_vadd_s32(simde_int32x2_t a, simde_int32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vadd_s32(a, b);
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#else
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simde_int32x2_private
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r_,
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a_ = simde_int32x2_to_private(a),
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b_ = simde_int32x2_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = a_.values + b_.values;
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#elif defined(SIMDE_X86_MMX_NATIVE)
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r_.m64 = _mm_add_pi32(a_.m64, b_.m64);
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = a_.values[i] + b_.values[i];
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}
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#endif
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return simde_int32x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vadd_s32
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#define vadd_s32(a, b) simde_vadd_s32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int64x1_t
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simde_vadd_s64(simde_int64x1_t a, simde_int64x1_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vadd_s64(a, b);
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#else
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simde_int64x1_private
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r_,
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a_ = simde_int64x1_to_private(a),
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b_ = simde_int64x1_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = a_.values + b_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = a_.values[i] + b_.values[i];
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}
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#endif
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return simde_int64x1_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vadd_s64
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#define vadd_s64(a, b) simde_vadd_s64((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint8x8_t
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simde_vadd_u8(simde_uint8x8_t a, simde_uint8x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vadd_u8(a, b);
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#else
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simde_uint8x8_private
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r_,
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a_ = simde_uint8x8_to_private(a),
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b_ = simde_uint8x8_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = a_.values + b_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = a_.values[i] + b_.values[i];
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}
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#endif
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return simde_uint8x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vadd_u8
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#define vadd_u8(a, b) simde_vadd_u8((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint16x4_t
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simde_vadd_u16(simde_uint16x4_t a, simde_uint16x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vadd_u16(a, b);
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#else
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simde_uint16x4_private
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r_,
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a_ = simde_uint16x4_to_private(a),
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b_ = simde_uint16x4_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = a_.values + b_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = a_.values[i] + b_.values[i];
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}
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#endif
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return simde_uint16x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vadd_u16
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#define vadd_u16(a, b) simde_vadd_u16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint32x2_t
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simde_vadd_u32(simde_uint32x2_t a, simde_uint32x2_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vadd_u32(a, b);
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#else
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simde_uint32x2_private
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r_,
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a_ = simde_uint32x2_to_private(a),
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b_ = simde_uint32x2_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = a_.values + b_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = a_.values[i] + b_.values[i];
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}
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#endif
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return simde_uint32x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vadd_u32
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#define vadd_u32(a, b) simde_vadd_u32((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_uint64x1_t
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simde_vadd_u64(simde_uint64x1_t a, simde_uint64x1_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vadd_u64(a, b);
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#else
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simde_uint64x1_private
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r_,
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a_ = simde_uint64x1_to_private(a),
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b_ = simde_uint64x1_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.values = a_.values + b_.values;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = a_.values[i] + b_.values[i];
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}
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#endif
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return simde_uint64x1_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vadd_u64
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#define vadd_u64(a, b) simde_vadd_u64((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float16x8_t
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simde_vaddq_f16(simde_float16x8_t a, simde_float16x8_t b) {
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#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
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return vaddq_f16(a, b);
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#else
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simde_float16x8_private
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r_,
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a_ = simde_float16x8_to_private(a),
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b_ = simde_float16x8_to_private(b);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = simde_vaddh_f16(a_.values[i], b_.values[i]);
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}
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return simde_float16x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
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#undef vaddq_f16
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#define vaddq_f16(a, b) simde_vaddq_f16((a), (b))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_float32x4_t
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simde_vaddq_f32(simde_float32x4_t a, simde_float32x4_t b) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vaddq_f32(a, b);
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#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
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SIMDE_POWER_ALTIVEC_VECTOR(float) a_ , b_, r_;
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a_ = a;
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b_ = b;
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r_ = vec_add(a_, b_);
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return r_;
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#else
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simde_float32x4_private
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r_,
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a_ = simde_float32x4_to_private(a),
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b_ = simde_float32x4_to_private(b);
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#if defined(SIMDE_X86_SSE_NATIVE)
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r_.m128 = _mm_add_ps(a_.m128, b_.m128);
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#elif defined(SIMDE_WASM_SIMD128_NATIVE)
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r_.v128 = wasm_f32x4_add(a_.v128, b_.v128);
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#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
|
r_.values = a_.values + b_.values;
|
|
#else
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
|
r_.values[i] = a_.values[i] + b_.values[i];
|
|
}
|
|
#endif
|
|
|
|
return simde_float32x4_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
|
#undef vaddq_f32
|
|
#define vaddq_f32(a, b) simde_vaddq_f32((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_float64x2_t
|
|
simde_vaddq_f64(simde_float64x2_t a, simde_float64x2_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
|
|
return vaddq_f64(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P7_NATIVE)
|
|
return vec_add(a, b);
|
|
#else
|
|
simde_float64x2_private
|
|
r_,
|
|
a_ = simde_float64x2_to_private(a),
|
|
b_ = simde_float64x2_to_private(b);
|
|
|
|
#if defined(SIMDE_X86_SSE2_NATIVE)
|
|
r_.m128d = _mm_add_pd(a_.m128d, b_.m128d);
|
|
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_f64x2_add(a_.v128, b_.v128);
|
|
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
|
r_.values = a_.values + b_.values;
|
|
#else
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
|
r_.values[i] = a_.values[i] + b_.values[i];
|
|
}
|
|
#endif
|
|
|
|
return simde_float64x2_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
|
|
#undef vaddq_f64
|
|
#define vaddq_f64(a, b) simde_vaddq_f64((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_int8x16_t
|
|
simde_vaddq_s8(simde_int8x16_t a, simde_int8x16_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
return vaddq_s8(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
|
return vec_add(a, b);
|
|
#else
|
|
simde_int8x16_private
|
|
r_,
|
|
a_ = simde_int8x16_to_private(a),
|
|
b_ = simde_int8x16_to_private(b);
|
|
|
|
#if defined(SIMDE_X86_SSE2_NATIVE)
|
|
r_.m128i = _mm_add_epi8(a_.m128i, b_.m128i);
|
|
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_i8x16_add(a_.v128, b_.v128);
|
|
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
|
r_.values = a_.values + b_.values;
|
|
#else
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
|
r_.values[i] = a_.values[i] + b_.values[i];
|
|
}
|
|
#endif
|
|
|
|
return simde_int8x16_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
|
#undef vaddq_s8
|
|
#define vaddq_s8(a, b) simde_vaddq_s8((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_int16x8_t
|
|
simde_vaddq_s16(simde_int16x8_t a, simde_int16x8_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
return vaddq_s16(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
|
return vec_add(a, b);
|
|
#else
|
|
simde_int16x8_private
|
|
r_,
|
|
a_ = simde_int16x8_to_private(a),
|
|
b_ = simde_int16x8_to_private(b);
|
|
|
|
#if defined(SIMDE_X86_SSE2_NATIVE)
|
|
r_.m128i = _mm_add_epi16(a_.m128i, b_.m128i);
|
|
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_i16x8_add(a_.v128, b_.v128);
|
|
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
|
r_.values = a_.values + b_.values;
|
|
#else
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
|
r_.values[i] = a_.values[i] + b_.values[i];
|
|
}
|
|
#endif
|
|
|
|
return simde_int16x8_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
|
#undef vaddq_s16
|
|
#define vaddq_s16(a, b) simde_vaddq_s16((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_int32x4_t
|
|
simde_vaddq_s32(simde_int32x4_t a, simde_int32x4_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
return vaddq_s32(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
|
return vec_add(a, b);
|
|
#else
|
|
simde_int32x4_private
|
|
r_,
|
|
a_ = simde_int32x4_to_private(a),
|
|
b_ = simde_int32x4_to_private(b);
|
|
|
|
#if defined(SIMDE_X86_SSE2_NATIVE)
|
|
r_.m128i = _mm_add_epi32(a_.m128i, b_.m128i);
|
|
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_i32x4_add(a_.v128, b_.v128);
|
|
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
|
r_.values = a_.values + b_.values;
|
|
#else
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
|
r_.values[i] = a_.values[i] + b_.values[i];
|
|
}
|
|
#endif
|
|
|
|
return simde_int32x4_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
|
#undef vaddq_s32
|
|
#define vaddq_s32(a, b) simde_vaddq_s32((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_int64x2_t
|
|
simde_vaddq_s64(simde_int64x2_t a, simde_int64x2_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
return vaddq_s64(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
|
|
return vec_add(a, b);
|
|
#else
|
|
simde_int64x2_private
|
|
r_,
|
|
a_ = simde_int64x2_to_private(a),
|
|
b_ = simde_int64x2_to_private(b);
|
|
|
|
#if defined(SIMDE_X86_SSE2_NATIVE)
|
|
r_.m128i = _mm_add_epi64(a_.m128i, b_.m128i);
|
|
#elif defined(SIMDE_WASM_SIMD128_NATIVE)
|
|
r_.v128 = wasm_i64x2_add(a_.v128, b_.v128);
|
|
#elif defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
|
r_.values = a_.values + b_.values;
|
|
#else
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
|
r_.values[i] = a_.values[i] + b_.values[i];
|
|
}
|
|
#endif
|
|
|
|
return simde_int64x2_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
|
#undef vaddq_s64
|
|
#define vaddq_s64(a, b) simde_vaddq_s64((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_uint8x16_t
|
|
simde_vaddq_u8(simde_uint8x16_t a, simde_uint8x16_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
return vaddq_u8(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
|
return vec_add(a, b);
|
|
#else
|
|
simde_uint8x16_private
|
|
r_,
|
|
a_ = simde_uint8x16_to_private(a),
|
|
b_ = simde_uint8x16_to_private(b);
|
|
|
|
#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
|
r_.values = a_.values + b_.values;
|
|
#else
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
|
r_.values[i] = a_.values[i] + b_.values[i];
|
|
}
|
|
#endif
|
|
|
|
return simde_uint8x16_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
|
#undef vaddq_u8
|
|
#define vaddq_u8(a, b) simde_vaddq_u8((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_uint16x8_t
|
|
simde_vaddq_u16(simde_uint16x8_t a, simde_uint16x8_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
return vaddq_u16(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
|
return vec_add(a, b);
|
|
#else
|
|
simde_uint16x8_private
|
|
r_,
|
|
a_ = simde_uint16x8_to_private(a),
|
|
b_ = simde_uint16x8_to_private(b);
|
|
|
|
#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
|
r_.values = a_.values + b_.values;
|
|
#else
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
|
r_.values[i] = a_.values[i] + b_.values[i];
|
|
}
|
|
#endif
|
|
|
|
return simde_uint16x8_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
|
#undef vaddq_u16
|
|
#define vaddq_u16(a, b) simde_vaddq_u16((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_uint32x4_t
|
|
simde_vaddq_u32(simde_uint32x4_t a, simde_uint32x4_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
return vaddq_u32(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
|
|
return vec_add(a, b);
|
|
#else
|
|
simde_uint32x4_private
|
|
r_,
|
|
a_ = simde_uint32x4_to_private(a),
|
|
b_ = simde_uint32x4_to_private(b);
|
|
|
|
#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
|
r_.values = a_.values + b_.values;
|
|
#else
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
|
r_.values[i] = a_.values[i] + b_.values[i];
|
|
}
|
|
#endif
|
|
|
|
return simde_uint32x4_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
|
#undef vaddq_u32
|
|
#define vaddq_u32(a, b) simde_vaddq_u32((a), (b))
|
|
#endif
|
|
|
|
SIMDE_FUNCTION_ATTRIBUTES
|
|
simde_uint64x2_t
|
|
simde_vaddq_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
|
|
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
|
|
return vaddq_u64(a, b);
|
|
#elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
|
|
return vec_add(a, b);
|
|
#else
|
|
simde_uint64x2_private
|
|
r_,
|
|
a_ = simde_uint64x2_to_private(a),
|
|
b_ = simde_uint64x2_to_private(b);
|
|
|
|
#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
|
|
r_.values = a_.values + b_.values;
|
|
#else
|
|
SIMDE_VECTORIZE
|
|
for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
|
|
r_.values[i] = a_.values[i] + b_.values[i];
|
|
}
|
|
#endif
|
|
|
|
return simde_uint64x2_from_private(r_);
|
|
#endif
|
|
}
|
|
#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
|
|
#undef vaddq_u64
|
|
#define vaddq_u64(a, b) simde_vaddq_u64((a), (b))
|
|
#endif
|
|
|
|
SIMDE_END_DECLS_
|
|
HEDLEY_DIAGNOSTIC_POP
|
|
|
|
#endif /* !defined(SIMDE_ARM_NEON_ADD_H) */
|