144 lines
4.8 KiB
C
144 lines
4.8 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2021 Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
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* 2021 Evan Nemerson <evan@nemerson.com>
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*/
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#if !defined(SIMDE_ARM_NEON_QSHRN_N_H)
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#define SIMDE_ARM_NEON_QSHRN_N_H
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#include "types.h"
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#include "shr_n.h"
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#include "qmovn.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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#define simde_vqshrns_n_s32(a, n) vqshrns_n_s32(a, n)
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#else
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#define simde_vqshrns_n_s32(a, n) simde_vqmovns_s32(simde_x_vshrs_n_s32(a, n))
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#endif
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vqshrns_n_s32
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#define vqshrns_n_s32(a, n) simde_vqshrns_n_s32(a, n)
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#endif
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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#define simde_vqshrns_n_u32(a, n) vqshrns_n_u32(a, n)
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#else
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#define simde_vqshrns_n_u32(a, n) simde_vqmovns_u32(simde_x_vshrs_n_u32(a, n))
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#endif
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vqshrns_n_u32
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#define vqshrns_n_u32(a, n) simde_vqshrns_n_u32(a, n)
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#endif
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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#define simde_vqshrnd_n_s64(a, n) vqshrnd_n_s64(a, n)
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#else
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#define simde_vqshrnd_n_s64(a, n) simde_vqmovnd_s64(simde_vshrd_n_s64(a, n))
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#endif
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vqshrnd_n_s64
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#define vqshrnd_n_s64(a, n) simde_vqshrnd_n_s64(a, n)
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#endif
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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#define simde_vqshrnd_n_u64(a, n) vqshrnd_n_u64(a, n)
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#else
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#define simde_vqshrnd_n_u64(a, n) simde_vqmovnd_u64(simde_vshrd_n_u64(a, n))
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#endif
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vqshrnd_n_u64
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#define vqshrnd_n_u64(a, n) simde_vqshrnd_n_u64(a, n)
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vqshrn_n_s16(a, n) vqshrn_n_s16((a), (n))
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#else
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#define simde_vqshrn_n_s16(a, n) simde_vqmovn_s16(simde_vshrq_n_s16(a, n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqshrn_n_s16
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#define vqshrn_n_s16(a, n) simde_vqshrn_n_s16((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vqshrn_n_s32(a, n) vqshrn_n_s32((a), (n))
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#else
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#define simde_vqshrn_n_s32(a, n) simde_vqmovn_s32(simde_vshrq_n_s32(a, n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqshrn_n_s32
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#define vqshrn_n_s32(a, n) simde_vqshrn_n_s32((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vqshrn_n_s64(a, n) vqshrn_n_s64((a), (n))
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#else
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#define simde_vqshrn_n_s64(a, n) simde_vqmovn_s64(simde_vshrq_n_s64(a, n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqshrn_n_s64
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#define vqshrn_n_s64(a, n) simde_vqshrn_n_s64((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vqshrn_n_u16(a, n) vqshrn_n_u16((a), (n))
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#else
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#define simde_vqshrn_n_u16(a, n) simde_vqmovn_u16(simde_vshrq_n_u16(a, n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqshrn_n_u16
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#define vqshrn_n_u16(a, n) simde_vqshrn_n_u16((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vqshrn_n_u32(a, n) vqshrn_n_u32((a), (n))
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#else
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#define simde_vqshrn_n_u32(a, n) simde_vqmovn_u32(simde_vshrq_n_u32(a, n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqshrn_n_u32
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#define vqshrn_n_u32(a, n) simde_vqshrn_n_u32((a), (n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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#define simde_vqshrn_n_u64(a, n) vqshrn_n_u64((a), (n))
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#else
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#define simde_vqshrn_n_u64(a, n) simde_vqmovn_u64(simde_vshrq_n_u64(a, n))
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#endif
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqshrn_n_u64
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#define vqshrn_n_u64(a, n) simde_vqshrn_n_u64((a), (n))
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_QSHRN_N_H) */
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