302 lines
8.4 KiB
C
302 lines
8.4 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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*/
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#if !defined(SIMDE_ARM_NEON_QNEG_H)
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#define SIMDE_ARM_NEON_QNEG_H
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#include "types.h"
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#if !defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE) || 1
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#include "dup_n.h"
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#include "max.h"
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#include "neg.h"
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#endif
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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int8_t
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simde_vqnegb_s8(int8_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vqnegb_s8(a);
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#else
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return a == INT8_MIN ? INT8_MAX : -a;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vqnegb_s8
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#define vqnegb_s8(a) simde_vqnegb_s8(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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int16_t
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simde_vqnegh_s16(int16_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vqnegh_s16(a);
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#else
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return a == INT16_MIN ? INT16_MAX : -a;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vqnegh_s16
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#define vqnegh_s16(a) simde_vqnegh_s16(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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int32_t
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simde_vqnegs_s32(int32_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vqnegs_s32(a);
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#else
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return a == INT32_MIN ? INT32_MAX : -a;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vqnegs_s32
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#define vqnegs_s32(a) simde_vqnegs_s32(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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int64_t
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simde_vqnegd_s64(int64_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vqnegd_s64(a);
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#else
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return a == INT64_MIN ? INT64_MAX : -a;
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
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#undef vqnegd_s64
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#define vqnegd_s64(a) simde_vqnegd_s64(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x8_t
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simde_vqneg_s8(simde_int8x8_t a) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vqneg_s8(a);
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#elif SIMDE_NATURAL_VECTOR_SIZE_GE(64)
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return simde_vneg_s8(simde_vmax_s8(a, simde_vdup_n_s8(INT8_MIN + 1)));
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#else
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simde_int8x8_private
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r_,
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a_ = simde_int8x8_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (a_.values[i] == INT8_MIN) ? INT8_MAX : -(a_.values[i]);
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}
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return simde_int8x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqneg_s8
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#define vqneg_s8(a) simde_vqneg_s8(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x4_t
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simde_vqneg_s16(simde_int16x4_t a) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vqneg_s16(a);
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#elif SIMDE_NATURAL_VECTOR_SIZE_GE(64)
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return simde_vneg_s16(simde_vmax_s16(a, simde_vdup_n_s16(INT16_MIN + 1)));
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#else
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simde_int16x4_private
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r_,
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a_ = simde_int16x4_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (a_.values[i] == INT16_MIN) ? INT16_MAX : -(a_.values[i]);
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}
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return simde_int16x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqneg_s16
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#define vqneg_s16(a) simde_vqneg_s16(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x2_t
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simde_vqneg_s32(simde_int32x2_t a) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vqneg_s32(a);
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#elif SIMDE_NATURAL_VECTOR_SIZE_GE(64)
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return simde_vneg_s32(simde_vmax_s32(a, simde_vdup_n_s32(INT32_MIN + 1)));
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#else
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simde_int32x2_private
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r_,
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a_ = simde_int32x2_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (a_.values[i] == INT32_MIN) ? INT32_MAX : -(a_.values[i]);
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}
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return simde_int32x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqneg_s32
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#define vqneg_s32(a) simde_vqneg_s32(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int64x1_t
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simde_vqneg_s64(simde_int64x1_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vqneg_s64(a);
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#elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
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return simde_vneg_s64(simde_x_vmax_s64(a, simde_vdup_n_s64(INT64_MIN + 1)));
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#else
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simde_int64x1_private
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r_,
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a_ = simde_int64x1_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (a_.values[i] == INT64_MIN) ? INT64_MAX : -(a_.values[i]);
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}
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return simde_int64x1_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqneg_s64
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#define vqneg_s64(a) simde_vqneg_s64(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int8x16_t
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simde_vqnegq_s8(simde_int8x16_t a) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vqnegq_s8(a);
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#elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
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return simde_vnegq_s8(simde_vmaxq_s8(a, simde_vdupq_n_s8(INT8_MIN + 1)));
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#else
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simde_int8x16_private
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r_,
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a_ = simde_int8x16_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (a_.values[i] == INT8_MIN) ? INT8_MAX : -(a_.values[i]);
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}
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return simde_int8x16_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqnegq_s8
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#define vqnegq_s8(a) simde_vqnegq_s8(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int16x8_t
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simde_vqnegq_s16(simde_int16x8_t a) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vqnegq_s16(a);
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#elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
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return simde_vnegq_s16(simde_vmaxq_s16(a, simde_vdupq_n_s16(INT16_MIN + 1)));
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#else
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simde_int16x8_private
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r_,
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a_ = simde_int16x8_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (a_.values[i] == INT16_MIN) ? INT16_MAX : -(a_.values[i]);
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}
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return simde_int16x8_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqnegq_s16
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#define vqnegq_s16(a) simde_vqnegq_s16(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int32x4_t
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simde_vqnegq_s32(simde_int32x4_t a) {
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#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
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return vqnegq_s32(a);
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#elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
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return simde_vnegq_s32(simde_vmaxq_s32(a, simde_vdupq_n_s32(INT32_MIN + 1)));
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#else
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simde_int32x4_private
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r_,
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a_ = simde_int32x4_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (a_.values[i] == INT32_MIN) ? INT32_MAX : -(a_.values[i]);
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}
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return simde_int32x4_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqnegq_s32
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#define vqnegq_s32(a) simde_vqnegq_s32(a)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_int64x2_t
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simde_vqnegq_s64(simde_int64x2_t a) {
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#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
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return vqnegq_s64(a);
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#elif SIMDE_NATURAL_VECTOR_SIZE_GE(128)
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return simde_vnegq_s64(simde_x_vmaxq_s64(a, simde_vdupq_n_s64(INT64_MIN + 1)));
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#else
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simde_int64x2_private
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r_,
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a_ = simde_int64x2_to_private(a);
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
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r_.values[i] = (a_.values[i] == INT64_MIN) ? INT64_MAX : -(a_.values[i]);
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}
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return simde_int64x2_from_private(r_);
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#endif
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}
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#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
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#undef vqnegq_s64
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#define vqnegq_s64(a) simde_vqnegq_s64(a)
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_ARM_NEON_QNEG_H) */
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