248 lines
10 KiB
C
248 lines
10 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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* 2020 Christopher Moore <moore@free.fr>
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*/
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#if !defined(SIMDE_X86_AVX512_SHUFFLE_H)
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#define SIMDE_X86_AVX512_SHUFFLE_H
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#include "types.h"
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#include "../avx2.h"
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#include "mov.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_shuffle_epi8 (simde__m512i a, simde__m512i b) {
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#if defined(SIMDE_X86_AVX512BW_NATIVE)
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return _mm512_shuffle_epi8(a, b);
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#else
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simde__m512i_private
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r_,
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a_ = simde__m512i_to_private(a),
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b_ = simde__m512i_to_private(b);
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#if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
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for (size_t i = 0 ; i < (sizeof(a_.m256i) / sizeof(a_.m256i[0])) ; i++) {
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r_.m256i[i] = simde_mm256_shuffle_epi8(a_.m256i[i], b_.m256i[i]);
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}
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.u8) / sizeof(r_.u8[0])) ; i++) {
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r_.u8[i] = (b_.u8[i] & 0x80) ? 0 : a_.u8[(b_.u8[i] & 0x0f) + (i & 0x30)];
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}
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#endif
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return simde__m512i_from_private(r_);
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#endif
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}
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#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
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#undef _mm512_shuffle_epi8
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#define _mm512_shuffle_epi8(a, b) simde_mm512_shuffle_epi8(a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_mask_shuffle_epi8 (simde__m512i src, simde__mmask64 k, simde__m512i a, simde__m512i b) {
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#if defined(SIMDE_X86_AVX512BW_NATIVE)
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return _mm512_mask_shuffle_epi8(src, k, a, b);
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#else
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return simde_mm512_mask_mov_epi8(src, k, simde_mm512_shuffle_epi8(a, b));
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#endif
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}
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#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
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#undef _mm512_mask_shuffle_epi8
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#define _mm512_mask_shuffle_epi8(src, k, a, b) simde_mm512_mask_shuffle_epi8(src, k, a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_maskz_shuffle_epi8 (simde__mmask64 k, simde__m512i a, simde__m512i b) {
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#if defined(SIMDE_X86_AVX512BW_NATIVE)
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return _mm512_maskz_shuffle_epi8(k, a, b);
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#else
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return simde_mm512_maskz_mov_epi8(k, simde_mm512_shuffle_epi8(a, b));
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#endif
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}
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#if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
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#undef _mm512_maskz_shuffle_epi8
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#define _mm512_maskz_shuffle_epi8(k, a, b) simde_mm512_maskz_shuffle_epi8(k, a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m256i
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simde_mm256_shuffle_i32x4 (simde__m256i a, simde__m256i b, const int imm8)
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SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 3) {
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simde__m256i_private
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r_,
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a_ = simde__m256i_to_private(a),
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b_ = simde__m256i_to_private(b);
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r_.m128i[0] = a_.m128i[ imm8 & 1];
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r_.m128i[1] = b_.m128i[(imm8 >> 1) & 1];
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return simde__m256i_from_private(r_);
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}
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#if defined(SIMDE_X86_AVX512F_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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#define simde_mm256_shuffle_i32x4(a, b, imm8) _mm256_shuffle_i32x4(a, b, imm8)
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#endif
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES) && defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
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#undef _mm256_shuffle_i32x4
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#define _mm256_shuffle_i32x4(a, b, imm8) simde_mm256_shuffle_i32x4(a, b, imm8)
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#endif
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#define simde_mm256_maskz_shuffle_i32x4(k, a, b, imm8) simde_mm256_maskz_mov_epi32(k, simde_mm256_shuffle_i32x4(a, b, imm8))
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#define simde_mm256_mask_shuffle_i32x4(src, k, a, b, imm8) simde_mm256_mask_mov_epi32(src, k, simde_mm256_shuffle_i32x4(a, b, imm8))
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#define simde_mm256_shuffle_f32x4(a, b, imm8) simde_mm256_castsi256_ps(simde_mm256_shuffle_i32x4(simde_mm256_castps_si256(a), simde_mm256_castps_si256(b), imm8))
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#define simde_mm256_maskz_shuffle_f32x4(k, a, b, imm8) simde_mm256_maskz_mov_ps(k, simde_mm256_shuffle_f32x4(a, b, imm8))
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#define simde_mm256_mask_shuffle_f32x4(src, k, a, b, imm8) simde_mm256_mask_mov_ps(src, k, simde_mm256_shuffle_f32x4(a, b, imm8))
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#define simde_mm256_shuffle_i64x2(a, b, imm8) simde_mm256_shuffle_i32x4(a, b, imm8)
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#define simde_mm256_maskz_shuffle_i64x2(k, a, b, imm8) simde_mm256_maskz_mov_epi64(k, simde_mm256_shuffle_i64x2(a, b, imm8))
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#define simde_mm256_mask_shuffle_i64x2(src, k, a, b, imm8) simde_mm256_mask_mov_epi64(src, k, simde_mm256_shuffle_i64x2(a, b, imm8))
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#define simde_mm256_shuffle_f64x2(a, b, imm8) simde_mm256_castsi256_pd(simde_mm256_shuffle_i64x2(simde_mm256_castpd_si256(a), simde_mm256_castpd_si256(b), imm8))
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#define simde_mm256_maskz_shuffle_f64x2(k, a, b, imm8) simde_mm256_maskz_mov_pd(k, simde_mm256_shuffle_f64x2(a, b, imm8))
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#define simde_mm256_mask_shuffle_f64x2(src, k, a, b, imm8) simde_mm256_mask_mov_pd(src, k, simde_mm256_shuffle_f64x2(a, b, imm8))
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_shuffle_i32x4 (simde__m512i a, simde__m512i b, const int imm8)
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SIMDE_REQUIRE_CONSTANT_RANGE(imm8, 0, 255) {
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simde__m512i_private
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r_,
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a_ = simde__m512i_to_private(a),
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b_ = simde__m512i_to_private(b);
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r_.m128i[0] = a_.m128i[ imm8 & 3];
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r_.m128i[1] = a_.m128i[(imm8 >> 2) & 3];
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r_.m128i[2] = b_.m128i[(imm8 >> 4) & 3];
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r_.m128i[3] = b_.m128i[(imm8 >> 6) & 3];
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return simde__m512i_from_private(r_);
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}
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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#define simde_mm512_shuffle_i32x4(a, b, imm8) _mm512_shuffle_i32x4(a, b, imm8)
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#endif
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_shuffle_i32x4
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#define _mm512_shuffle_i32x4(a, b, imm8) simde_mm512_shuffle_i32x4(a, b, imm8)
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#endif
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#define simde_mm512_maskz_shuffle_i32x4(k, a, b, imm8) simde_mm512_maskz_mov_epi32(k, simde_mm512_shuffle_i32x4(a, b, imm8))
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#define simde_mm512_mask_shuffle_i32x4(src, k, a, b, imm8) simde_mm512_mask_mov_epi32(src, k, simde_mm512_shuffle_i32x4(a, b, imm8))
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#define simde_mm512_shuffle_f32x4(a, b, imm8) simde_mm512_castsi512_ps(simde_mm512_shuffle_i32x4(simde_mm512_castps_si512(a), simde_mm512_castps_si512(b), imm8))
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#define simde_mm512_maskz_shuffle_f32x4(k, a, b, imm8) simde_mm512_maskz_mov_ps(k, simde_mm512_shuffle_f32x4(a, b, imm8))
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#define simde_mm512_mask_shuffle_f32x4(src, k, a, b, imm8) simde_mm512_mask_mov_ps(src, k, simde_mm512_shuffle_f32x4(a, b, imm8))
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#define simde_mm512_shuffle_i64x2(a, b, imm8) simde_mm512_shuffle_i32x4(a, b, imm8)
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#define simde_mm512_maskz_shuffle_i64x2(k, a, b, imm8) simde_mm512_maskz_mov_epi64(k, simde_mm512_shuffle_i64x2(a, b, imm8))
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#define simde_mm512_mask_shuffle_i64x2(src, k, a, b, imm8) simde_mm512_mask_mov_epi64(src, k, simde_mm512_shuffle_i64x2(a, b, imm8))
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#define simde_mm512_shuffle_f64x2(a, b, imm8) simde_mm512_castsi512_pd(simde_mm512_shuffle_i64x2(simde_mm512_castpd_si512(a), simde_mm512_castpd_si512(b), imm8))
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#define simde_mm512_maskz_shuffle_f64x2(k, a, b, imm8) simde_mm512_maskz_mov_pd(k, simde_mm512_shuffle_f64x2(a, b, imm8))
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#define simde_mm512_mask_shuffle_f64x2(src, k, a, b, imm8) simde_mm512_mask_mov_pd(src, k, simde_mm512_shuffle_f64x2(a, b, imm8))
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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#define simde_mm512_shuffle_ps(a, b, imm8) _mm512_shuffle_ps(a, b, imm8)
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#elif SIMDE_NATURAL_VECTOR_SIZE_LE(256) && defined(SIMDE_STATEMENT_EXPR_)
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#define simde_mm512_shuffle_ps(a, b, imm8) SIMDE_STATEMENT_EXPR_(({ \
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simde__m512_private \
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simde_mm512_shuffle_ps_a_ = simde__m512_to_private(a), \
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simde_mm512_shuffle_ps_b_ = simde__m512_to_private(b); \
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\
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simde_mm512_shuffle_ps_a_.m256[0] = simde_mm256_shuffle_ps(simde_mm512_shuffle_ps_a_.m256[0], simde_mm512_shuffle_ps_b_.m256[0], imm8); \
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simde_mm512_shuffle_ps_a_.m256[1] = simde_mm256_shuffle_ps(simde_mm512_shuffle_ps_a_.m256[1], simde_mm512_shuffle_ps_b_.m256[1], imm8); \
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\
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simde__m512_from_private(simde_mm512_shuffle_ps_a_); \
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}))
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#elif defined(SIMDE_SHUFFLE_VECTOR_) && defined(SIMDE_STATEMENT_EXPR_)
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#define simde_mm512_shuffle_ps(a, b, imm8) SIMDE_STATEMENT_EXPR_(({ \
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simde__m512_private \
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simde_mm512_shuffle_ps_a_ = simde__m512_to_private(a), \
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simde_mm512_shuffle_ps_b_ = simde__m512_to_private(b); \
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\
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simde_mm512_shuffle_ps_a_.f32 = \
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SIMDE_SHUFFLE_VECTOR_( \
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32, 64, \
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simde_mm512_shuffle_ps_a_.f32, \
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simde_mm512_shuffle_ps_b_.f32, \
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(((imm8) ) & 3), \
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(((imm8) >> 2) & 3), \
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(((imm8) >> 4) & 3) + 16, \
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(((imm8) >> 6) & 3) + 16, \
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(((imm8) ) & 3) + 4, \
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(((imm8) >> 2) & 3) + 4, \
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(((imm8) >> 4) & 3) + 20, \
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(((imm8) >> 6) & 3) + 20, \
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(((imm8) ) & 3) + 8, \
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(((imm8) >> 2) & 3) + 8, \
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(((imm8) >> 4) & 3) + 24, \
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(((imm8) >> 6) & 3) + 24, \
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(((imm8) ) & 3) + 12, \
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(((imm8) >> 2) & 3) + 12, \
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(((imm8) >> 4) & 3) + 28, \
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(((imm8) >> 6) & 3) + 28 \
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); \
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\
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simde__m512_from_private(simde_mm512_shuffle_ps_a_); \
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}))
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#else
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512
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simde_mm512_shuffle_ps(simde__m512 a, simde__m512 b, int imm8)
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SIMDE_REQUIRE_CONSTANT_RANGE (imm8, 0, 255) {
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simde__m512_private
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r_,
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a_ = simde__m512_to_private(a),
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b_ = simde__m512_to_private(b);
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for (size_t i = 0 ; i < (sizeof(r_.m128_private) / sizeof(r_.m128_private[0])) ; i++) {
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const size_t halfway = (sizeof(r_.m128_private[i].f32) / sizeof(r_.m128_private[i].f32[0]) / 2);
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SIMDE_VECTORIZE
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for (size_t j = 0 ; j < halfway ; j++) {
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r_.m128_private[i].f32[j] = a_.m128_private[i].f32[(imm8 >> (j * 2)) & 3];
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r_.m128_private[i].f32[halfway + j] = b_.m128_private[i].f32[(imm8 >> ((halfway + j) * 2)) & 3];
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}
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}
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return simde__m512_from_private(r_);
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}
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#endif
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_shuffle_ps
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#define _mm512_shuffle_ps(a, b, imm8) simde_mm512_shuffle_ps(a, b, imm8)
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_X86_AVX512_SHUFFLE_H) */
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