280 lines
8.9 KiB
C
280 lines
8.9 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2020 Evan Nemerson <evan@nemerson.com>
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* 2020 Himanshi Mathur <himanshi18037@iiitd.ac.in>
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* 2020 Hidayat Khan <huk2209@gmail.com>
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*/
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#if !defined(SIMDE_X86_AVX512_MUL_H)
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#define SIMDE_X86_AVX512_MUL_H
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#include "types.h"
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#include "mov.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_BEGIN_DECLS_
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512
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simde_mm512_mul_ps (simde__m512 a, simde__m512 b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_mul_ps(a, b);
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#else
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simde__m512_private
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r_,
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a_ = simde__m512_to_private(a),
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b_ = simde__m512_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.f32 = a_.f32 * b_.f32;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.m256) / sizeof(r_.m256[0])) ; i++) {
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r_.m256[i] = simde_mm256_mul_ps(a_.m256[i], b_.m256[i]);
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}
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#endif
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return simde__m512_from_private(r_);
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_mul_ps
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#define _mm512_mul_ps(a, b) simde_mm512_mul_ps(a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512
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simde_mm512_mask_mul_ps(simde__m512 src, simde__mmask16 k, simde__m512 a, simde__m512 b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_mask_mul_ps(src, k, a, b);
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#else
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return simde_mm512_mask_mov_ps(src, k, simde_mm512_mul_ps(a, b));
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_mask_mul_ps
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#define _mm512_mask_mul_ps(src, k, a, b) simde_mm512_mask_mul_ps(src, k, a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512
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simde_mm512_maskz_mul_ps(simde__mmask16 k, simde__m512 a, simde__m512 b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_maskz_mul_ps(k, a, b);
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#else
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return simde_mm512_maskz_mov_ps(k, simde_mm512_mul_ps(a, b));
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_maskz_mul_ps
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#define _mm512_maskz_mul_ps(k, a, b) simde_mm512_maskz_mul_ps(k, a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512d
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simde_mm512_mul_pd (simde__m512d a, simde__m512d b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_mul_pd(a, b);
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#else
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simde__m512d_private
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r_,
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a_ = simde__m512d_to_private(a),
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b_ = simde__m512d_to_private(b);
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#if defined(SIMDE_VECTOR_SUBSCRIPT_OPS)
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r_.f64 = a_.f64 * b_.f64;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.m256d) / sizeof(r_.m256d[0])) ; i++) {
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r_.m256d[i] = simde_mm256_mul_pd(a_.m256d[i], b_.m256d[i]);
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}
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#endif
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return simde__m512d_from_private(r_);
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_mul_pd
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#define _mm512_mul_pd(a, b) simde_mm512_mul_pd(a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512d
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simde_mm512_mask_mul_pd(simde__m512d src, simde__mmask8 k, simde__m512d a, simde__m512d b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_mask_mul_pd(src, k, a, b);
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#else
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return simde_mm512_mask_mov_pd(src, k, simde_mm512_mul_pd(a, b));
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_mask_mul_pd
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#define _mm512_mask_mul_pd(src, k, a, b) simde_mm512_mask_mul_pd(src, k, a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512d
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simde_mm512_maskz_mul_pd(simde__mmask8 k, simde__m512d a, simde__m512d b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_maskz_mul_pd(k, a, b);
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#else
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return simde_mm512_maskz_mov_pd(k, simde_mm512_mul_pd(a, b));
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_maskz_mul_pd
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#define _mm512_maskz_mul_pd(k, a, b) simde_mm512_maskz_mul_pd(k, a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_mul_epi32 (simde__m512i a, simde__m512i b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_mul_epi32(a, b);
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#else
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simde__m512i_private
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r_,
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a_ = simde__m512i_to_private(a),
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b_ = simde__m512i_to_private(b);
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#if defined(SIMDE_CONVERT_VECTOR_) && defined(SIMDE_SHUFFLE_VECTOR_)
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simde__m512i_private x;
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__typeof__(r_.i64) ta, tb;
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/* Get even numbered 32-bit values */
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x.i32 = SIMDE_SHUFFLE_VECTOR_(32, 64, a_.i32, b_.i32, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30);
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/* Cast to 64 bits */
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SIMDE_CONVERT_VECTOR_(ta, x.m256i_private[0].i32);
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SIMDE_CONVERT_VECTOR_(tb, x.m256i_private[1].i32);
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r_.i64 = ta * tb;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.i64) / sizeof(r_.i64[0])) ; i++) {
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r_.i64[i] = HEDLEY_STATIC_CAST(int64_t, a_.i32[i << 1]) * HEDLEY_STATIC_CAST(int64_t, b_.i32[i << 1]);
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}
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#endif
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return simde__m512i_from_private(r_);
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_mul_epi32
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#define _mm512_mul_epi32(a, b) simde_mm512_mul_epi32(a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_mask_mul_epi32(simde__m512i src, simde__mmask8 k, simde__m512i a, simde__m512i b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_mask_mul_epi32(src, k, a, b);
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#else
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return simde_mm512_mask_mov_epi64(src, k, simde_mm512_mul_epi32(a, b));
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_mask_mul_epi32
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#define _mm512_mask_mul_epi32(src, k, a, b) simde_mm512_mask_mul_epi32(src, k, a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_maskz_mul_epi32(simde__mmask8 k, simde__m512i a, simde__m512i b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_maskz_mul_epi32(k, a, b);
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#else
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return simde_mm512_maskz_mov_epi64(k, simde_mm512_mul_epi32(a, b));
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_maskz_mul_epi32
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#define _mm512_maskz_mul_epi32(k, a, b) simde_mm512_maskz_mul_epi32(k, a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_mul_epu32 (simde__m512i a, simde__m512i b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_mul_epu32(a, b);
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#else
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simde__m512i_private
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r_,
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a_ = simde__m512i_to_private(a),
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b_ = simde__m512i_to_private(b);
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#if defined(SIMDE_CONVERT_VECTOR_) && defined(SIMDE_SHUFFLE_VECTOR_)
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simde__m512i_private x;
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__typeof__(r_.u64) ta, tb;
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x.u32 = SIMDE_SHUFFLE_VECTOR_(32, 64, a_.u32, b_.u32, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30);
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SIMDE_CONVERT_VECTOR_(ta, x.m256i_private[0].u32);
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SIMDE_CONVERT_VECTOR_(tb, x.m256i_private[1].u32);
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r_.u64 = ta * tb;
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#else
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SIMDE_VECTORIZE
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for (size_t i = 0 ; i < (sizeof(r_.u64) / sizeof(r_.u64[0])) ; i++) {
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r_.u64[i] = HEDLEY_STATIC_CAST(uint64_t, a_.u32[i << 1]) * HEDLEY_STATIC_CAST(uint64_t, b_.u32[i << 1]);
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}
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#endif
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return simde__m512i_from_private(r_);
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_mul_epu32
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#define _mm512_mul_epu32(a, b) simde_mm512_mul_epu32(a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_mask_mul_epu32(simde__m512i src, simde__mmask8 k, simde__m512i a, simde__m512i b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_mask_mul_epu32(src, k, a, b);
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#else
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return simde_mm512_mask_mov_epi64(src, k, simde_mm512_mul_epu32(a, b));
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_mask_mul_epu32
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#define _mm512_mask_mul_epu32(src, k, a, b) simde_mm512_mask_mul_epu32(src, k, a, b)
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m512i
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simde_mm512_maskz_mul_epu32(simde__mmask8 k, simde__m512i a, simde__m512i b) {
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#if defined(SIMDE_X86_AVX512F_NATIVE)
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return _mm512_maskz_mul_epu32(k, a, b);
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#else
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return simde_mm512_maskz_mov_epi64(k, simde_mm512_mul_epu32(a, b));
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#endif
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}
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#if defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
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#undef _mm512_maskz_mul_epu32
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#define _mm512_maskz_mul_epu32(k, a, b) simde_mm512_maskz_mul_epu32(k, a, b)
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#endif
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SIMDE_END_DECLS_
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HEDLEY_DIAGNOSTIC_POP
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#endif /* !defined(SIMDE_X86_AVX512_MUL_H) */
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