339 lines
12 KiB
C
339 lines
12 KiB
C
/* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Copyright:
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* 2021 Evan Nemerson <evan@nemerson.com>
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*/
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/* Note: we don't have vector implementations for most of these because
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* we can't just load everything and mask out the uninteresting bits;
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* that might cause a fault, for example if the end of the buffer buts
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* up against a protected page.
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*
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* One thing we might be able to do would be to check if the predicate
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* is all ones and, if so, use an unpredicated load instruction. This
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* would probably we worthwhile for smaller types, though perhaps not
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* for larger types since it would mean branching for every load plus
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* the overhead of checking whether all bits are 1. */
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#if !defined(SIMDE_ARM_SVE_LD1_H)
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#define SIMDE_ARM_SVE_LD1_H
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#include "types.h"
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HEDLEY_DIAGNOSTIC_PUSH
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SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
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SIMDE_FUNCTION_ATTRIBUTES
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simde_svint8_t
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simde_svld1_s8(simde_svbool_t pg, const int8_t * base) {
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#if defined(SIMDE_ARM_SVE_NATIVE)
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return svld1_s8(pg, base);
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#else
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simde_svint8_t r;
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#if defined(SIMDE_X86_AVX512BW_NATIVE) && (SIMDE_ARM_SVE_VECTOR_SIZE >= 512)
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r.m512i = _mm512_maskz_loadu_epi8(simde_svbool_to_mmask64(pg), base);
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#elif defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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r.m256i[0] = _mm256_maskz_loadu_epi8(simde_svbool_to_mmask32(pg), base);
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#else
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for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, simde_svcntb()) ; i++) {
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r.values[i] = pg.values_i8[i] ? base[i] : INT8_C(0);
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}
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#endif
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef simde_svld1_s8
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#define svld1_s8(pg, base) simde_svld1_s8((pg), (base))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_svint16_t
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simde_svld1_s16(simde_svbool_t pg, const int16_t * base) {
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#if defined(SIMDE_ARM_SVE_NATIVE)
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return svld1_s16(pg, base);
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#else
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simde_svint16_t r;
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#if defined(SIMDE_X86_AVX512BW_NATIVE) && (SIMDE_ARM_SVE_VECTOR_SIZE >= 512)
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r.m512i = _mm512_maskz_loadu_epi16(simde_svbool_to_mmask32(pg), base);
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#elif defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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r.m256i[0] = _mm256_maskz_loadu_epi16(simde_svbool_to_mmask16(pg), base);
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#else
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for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, simde_svcnth()) ; i++) {
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r.values[i] = pg.values_i16[i] ? base[i] : INT16_C(0);
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}
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#endif
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef simde_svld1_s16
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#define svld1_s16(pg, base) simde_svld1_s16((pg), (base))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_svint32_t
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simde_svld1_s32(simde_svbool_t pg, const int32_t * base) {
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#if defined(SIMDE_ARM_SVE_NATIVE)
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return svld1_s32(pg, base);
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#else
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simde_svint32_t r;
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#if defined(SIMDE_X86_AVX512BW_NATIVE) && (SIMDE_ARM_SVE_VECTOR_SIZE >= 512)
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r.m512i = _mm512_maskz_loadu_epi32(simde_svbool_to_mmask16(pg), base);
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#elif defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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r.m256i[0] = _mm256_maskz_loadu_epi32(simde_svbool_to_mmask8(pg), base);
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#else
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for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, simde_svcntw()) ; i++) {
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r.values[i] = pg.values_i32[i] ? base[i] : INT32_C(0);
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}
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#endif
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef simde_svld1_s32
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#define svld1_s32(pg, base) simde_svld1_s32((pg), (base))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_svint64_t
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simde_svld1_s64(simde_svbool_t pg, const int64_t * base) {
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#if defined(SIMDE_ARM_SVE_NATIVE)
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return svld1_s64(pg, base);
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#else
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simde_svint64_t r;
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#if defined(SIMDE_X86_AVX512BW_NATIVE) && (SIMDE_ARM_SVE_VECTOR_SIZE >= 512)
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r.m512i = _mm512_maskz_loadu_epi64(simde_svbool_to_mmask8(pg), base);
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#elif defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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r.m256i[0] = _mm256_maskz_loadu_epi64(simde_svbool_to_mmask4(pg), base);
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#else
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for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, simde_svcntd()) ; i++) {
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r.values[i] = pg.values_i64[i] ? base[i] : INT64_C(0);
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}
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#endif
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef simde_svld1_s64
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#define svld1_s64(pg, base) simde_svld1_s64((pg), (base))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_svuint8_t
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simde_svld1_u8(simde_svbool_t pg, const uint8_t * base) {
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#if defined(SIMDE_ARM_SVE_NATIVE)
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return svld1_u8(pg, base);
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#else
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simde_svuint8_t r;
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#if defined(SIMDE_X86_AVX512BW_NATIVE) && (SIMDE_ARM_SVE_VECTOR_SIZE >= 512)
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r.m512i = _mm512_maskz_loadu_epi8(simde_svbool_to_mmask64(pg), base);
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#elif defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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r.m256i[0] = _mm256_maskz_loadu_epi8(simde_svbool_to_mmask32(pg), base);
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#else
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for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, simde_svcntb()) ; i++) {
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r.values[i] = pg.values_i8[i] ? base[i] : UINT8_C(0);
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}
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#endif
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef simde_svld1_u8
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#define svld1_u8(pg, base) simde_svld1_u8((pg), (base))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_svuint16_t
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simde_svld1_u16(simde_svbool_t pg, const uint16_t * base) {
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#if defined(SIMDE_ARM_SVE_NATIVE)
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return svld1_u16(pg, base);
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#else
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simde_svuint16_t r;
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#if defined(SIMDE_X86_AVX512BW_NATIVE) && (SIMDE_ARM_SVE_VECTOR_SIZE >= 512)
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r.m512i = _mm512_maskz_loadu_epi16(simde_svbool_to_mmask32(pg), base);
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#elif defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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r.m256i[0] = _mm256_maskz_loadu_epi16(simde_svbool_to_mmask16(pg), base);
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#else
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for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, simde_svcnth()) ; i++) {
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r.values[i] = pg.values_i16[i] ? base[i] : UINT16_C(0);
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}
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#endif
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef simde_svld1_u16
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#define svld1_u16(pg, base) simde_svld1_u16((pg), (base))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_svuint32_t
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simde_svld1_u32(simde_svbool_t pg, const uint32_t * base) {
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#if defined(SIMDE_ARM_SVE_NATIVE)
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return svld1_u32(pg, base);
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#else
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simde_svuint32_t r;
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#if defined(SIMDE_X86_AVX512BW_NATIVE) && (SIMDE_ARM_SVE_VECTOR_SIZE >= 512)
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r.m512i = _mm512_maskz_loadu_epi32(simde_svbool_to_mmask16(pg), base);
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#elif defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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r.m256i[0] = _mm256_maskz_loadu_epi32(simde_svbool_to_mmask8(pg), base);
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#else
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for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, simde_svcntw()) ; i++) {
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r.values[i] = pg.values_i32[i] ? base[i] : UINT32_C(0);
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}
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#endif
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef simde_svld1_u32
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#define svld1_u32(pg, base) simde_svld1_u32((pg), (base))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_svuint64_t
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simde_svld1_u64(simde_svbool_t pg, const uint64_t * base) {
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#if defined(SIMDE_ARM_SVE_NATIVE)
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return svld1_u64(pg, base);
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#else
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simde_svuint64_t r;
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#if defined(SIMDE_X86_AVX512BW_NATIVE) && (SIMDE_ARM_SVE_VECTOR_SIZE >= 512)
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r.m512i = _mm512_maskz_loadu_epi64(simde_svbool_to_mmask8(pg), base);
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#elif defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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r.m256i[0] = _mm256_maskz_loadu_epi64(simde_svbool_to_mmask4(pg), base);
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#else
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for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, simde_svcntd()) ; i++) {
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r.values[i] = pg.values_i64[i] ? base[i] : UINT64_C(0);
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}
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#endif
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef simde_svld1_u64
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#define svld1_u64(pg, base) simde_svld1_u64((pg), (base))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_svfloat32_t
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simde_svld1_f32(simde_svbool_t pg, const simde_float32 * base) {
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#if defined(SIMDE_ARM_SVE_NATIVE)
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return svld1_f32(pg, base);
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#else
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simde_svfloat32_t r;
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#if defined(SIMDE_X86_AVX512BW_NATIVE) && (SIMDE_ARM_SVE_VECTOR_SIZE >= 512)
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r.m512 = _mm512_maskz_loadu_ps(simde_svbool_to_mmask16(pg), base);
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#elif defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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r.m256[0] = _mm256_maskz_loadu_ps(simde_svbool_to_mmask8(pg), base);
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#else
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for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, simde_svcntw()) ; i++) {
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r.values[i] = pg.values_i32[i] ? base[i] : SIMDE_FLOAT32_C(0.0);
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}
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#endif
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef simde_svld1_f32
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#define svld1_f32(pg, base) simde_svld1_f32((pg), (base))
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#endif
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SIMDE_FUNCTION_ATTRIBUTES
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simde_svfloat64_t
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simde_svld1_f64(simde_svbool_t pg, const simde_float64 * base) {
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#if defined(SIMDE_ARM_SVE_NATIVE)
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return svld1_f64(pg, base);
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#else
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simde_svfloat64_t r;
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#if defined(SIMDE_X86_AVX512BW_NATIVE) && (SIMDE_ARM_SVE_VECTOR_SIZE >= 512)
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r.m512d = _mm512_maskz_loadu_pd(simde_svbool_to_mmask8(pg), base);
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#elif defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
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r.m256d[0] = _mm256_maskz_loadu_pd(simde_svbool_to_mmask4(pg), base);
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#else
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for (int i = 0 ; i < HEDLEY_STATIC_CAST(int, simde_svcntd()) ; i++) {
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r.values[i] = pg.values_i64[i] ? base[i] : SIMDE_FLOAT64_C(0.0);
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}
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#endif
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return r;
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#endif
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}
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef simde_svld1_f64
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#define svld1_f64(pg, base) simde_svld1_f64((pg), (base))
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#endif
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#if defined(__cplusplus)
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SIMDE_FUNCTION_ATTRIBUTES simde_svint8_t simde_svld1(simde_svbool_t pg, const int8_t * base) { return simde_svld1_s8 (pg, base); }
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SIMDE_FUNCTION_ATTRIBUTES simde_svint16_t simde_svld1(simde_svbool_t pg, const int16_t * base) { return simde_svld1_s16(pg, base); }
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SIMDE_FUNCTION_ATTRIBUTES simde_svint32_t simde_svld1(simde_svbool_t pg, const int32_t * base) { return simde_svld1_s32(pg, base); }
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SIMDE_FUNCTION_ATTRIBUTES simde_svint64_t simde_svld1(simde_svbool_t pg, const int64_t * base) { return simde_svld1_s64(pg, base); }
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SIMDE_FUNCTION_ATTRIBUTES simde_svuint8_t simde_svld1(simde_svbool_t pg, const uint8_t * base) { return simde_svld1_u8 (pg, base); }
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SIMDE_FUNCTION_ATTRIBUTES simde_svuint16_t simde_svld1(simde_svbool_t pg, const uint16_t * base) { return simde_svld1_u16(pg, base); }
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SIMDE_FUNCTION_ATTRIBUTES simde_svuint32_t simde_svld1(simde_svbool_t pg, const uint32_t * base) { return simde_svld1_u32(pg, base); }
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SIMDE_FUNCTION_ATTRIBUTES simde_svuint64_t simde_svld1(simde_svbool_t pg, const uint64_t * base) { return simde_svld1_u64(pg, base); }
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SIMDE_FUNCTION_ATTRIBUTES simde_svfloat32_t simde_svld1(simde_svbool_t pg, const simde_float32 * base) { return simde_svld1_f32(pg, base); }
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SIMDE_FUNCTION_ATTRIBUTES simde_svfloat64_t simde_svld1(simde_svbool_t pg, const simde_float64 * base) { return simde_svld1_f64(pg, base); }
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#elif defined(SIMDE_GENERIC_)
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#define simde_svld1(pg, base) \
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(SIMDE_GENERIC_((base), \
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const int8_t *: simde_svld1_s8 , \
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const int16_t *: simde_svld1_s16, \
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const int32_t *: simde_svld1_s32, \
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const int64_t *: simde_svld1_s64, \
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const uint8_t *: simde_svld1_u8 , \
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const uint16_t *: simde_svld1_u16, \
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const uint32_t *: simde_svld1_u32, \
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const uint64_t *: simde_svld1_u64, \
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const simde_float32 *: simde_svld1_f32, \
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const simde_float64 *: simde_svld1_f64)(pg, base))
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#endif
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#if defined(SIMDE_ARM_SVE_ENABLE_NATIVE_ALIASES)
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#undef svld1
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#define svld1(pg, base) simde_svld1((pg), (base))
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#endif
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HEDLEY_DIAGNOSTIC_POP
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#endif /* SIMDE_ARM_SVE_LD1_H */
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