191 lines
7.6 KiB
C++
191 lines
7.6 KiB
C++
/************************************************************************************
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* KD8CEC
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* kd8cec@gmail.com http://www.hamskey.com
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*
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* Merge two SI5351 Librarys
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* KE7ER's fixed vco and variable Clocks Configure values
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* G3ZIL's fixed Clock Configure Value and variable VCO
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* * I have combined the two libraries above. All licenses follow the above library.
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*
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* PLL-A is generated by fixing 850Mhz clock. All output clocks use PLL-A to
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* generate the frequency. This is the method used in QRP radios such as uBITX.
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* When switching to WSPR transmission mode, PLL-B operates for the base frequency to transmit WSPR.
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* The output clock channel that controls the frequency is connected to the PLL-B.
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* The WSPR protocol is generated by changing the clock of the PLL-B.
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************************************************************************************/
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#include "ubitx.h"
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// ************* SI5315 routines - tks Jerry Gaffke, KE7ER ***********************
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// An minimalist standalone set of Si5351 routines.
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// VCOA is fixed at 875mhz, VCOB not used.
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// The output msynth dividers are used to generate 3 independent clocks
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// with 1hz resolution to any frequency between 4khz and 109mhz.
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// Usage:
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// Call si5351bx_init() once at startup with no args;
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// Call si5351bx_setfreq(clknum, freq) each time one of the
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// three output CLK pins is to be updated to a new frequency.
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// A freq of 0 serves to shut down that output clock.
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// The global variable si5351bx_vcoa starts out equal to the nominal VCOA
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// frequency of 25mhz*35 = 875000000 Hz. To correct for 25mhz crystal errors,
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// the user can adjust this value. The vco frequency will not change but
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// the number used for the (a+b/c) output msynth calculations is affected.
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// Example: We call for a 5mhz signal, but it measures to be 5.001mhz.
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// So the actual vcoa frequency is 875mhz*5.001/5.000 = 875175000 Hz,
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// To correct for this error: si5351bx_vcoa=875175000;
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// Most users will never need to generate clocks below 500khz.
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// But it is possible to do so by loading a value between 0 and 7 into
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// the global variable si5351bx_rdiv, be sure to return it to a value of 0
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// before setting some other CLK output pin. The affected clock will be
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// divided down by a power of two defined by 2**si5351_rdiv
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// A value of zero gives a divide factor of 1, a value of 7 divides by 128.
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// This lightweight method is a reasonable compromise for a seldom used feature.
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#define BB0(x) ((uint8_t)x) // Bust int32 into Bytes
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#define BB1(x) ((uint8_t)(x>>8))
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#define BB2(x) ((uint8_t)(x>>16))
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//#define SI5351BX_ADDR 0x60 // I2C address of Si5351 (typical)
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uint8_t SI5351BX_ADDR; // I2C address of Si5351 (variable from Version 1.097)
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#define SI5351BX_XTALPF 2 // 1:6pf 2:8pf 3:10pf
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// If using 27mhz crystal, set XTAL=27000000, MSA=33. Then vco=891mhz
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#define SI5351BX_XTAL 25000000 // Crystal freq in Hz
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#define SI5351BX_MSA 35 // VCOA is at 25mhz*35 = 875mhz
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// User program may have reason to poke new values into these 3 RAM variables
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uint32_t si5351bx_vcoa = (SI5351BX_XTAL*SI5351BX_MSA); // 25mhzXtal calibrate
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uint8_t si5351bx_rdiv = 0; // 0-7, CLK pin sees fout/(2**rdiv)
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#if UBITX_BOARD_VERSION == 5
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uint8_t si5351bx_drive[3] = {3, 3, 3}; // 0=2ma 1=4ma 2=6ma 3=8ma for CLK 0,1,2
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#else
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uint8_t si5351bx_drive[3] = {1, 1, 1}; // 0=2ma 1=4ma 2=6ma 3=8ma for CLK 0,1,2
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#endif
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uint8_t si5351bx_clken = 0xFF; // Private, all CLK output drivers off
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int32_t calibration = 0;
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void i2cWrite(uint8_t reg, uint8_t val) { // write reg via i2c
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Wire.beginTransmission(SI5351BX_ADDR);
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Wire.write(reg);
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Wire.write(val);
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Wire.endTransmission();
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}
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void i2cWriten(uint8_t reg, uint8_t *vals, uint8_t vcnt) { // write array
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Wire.beginTransmission(SI5351BX_ADDR);
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Wire.write(reg);
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while (vcnt--) Wire.write(*vals++);
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Wire.endTransmission();
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}
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uint8_t si5351Val[8] = {0, 1, 0, 0, 0, 0, 0, 0}; //for reduce program memory size
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void si5351bx_init() { // Call once at power-up, start PLLA
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uint32_t msxp1;
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Wire.begin();
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i2cWrite(149, 0); // SpreadSpectrum off
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i2cWrite(3, si5351bx_clken); // Disable all CLK output drivers
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i2cWrite(183, SI5351BX_XTALPF << 6); // Set 25mhz crystal load capacitance
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msxp1 = 128 * SI5351BX_MSA - 512; // and msxp2=0, msxp3=1, not fractional
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//uint8_t vals[8] = {0, 1, BB2(msxp1), BB1(msxp1), BB0(msxp1), 0, 0, 0};
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si5351Val[2] = BB2(msxp1);
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si5351Val[3] = BB1(msxp1);
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si5351Val[4] = BB0(msxp1);
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i2cWriten(26, si5351Val, 8); // Write to 8 PLLA msynth regs
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i2cWrite(177, 0x20); // Reset PLLA (0x80 resets PLLB)
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#if UBITX_BOARD_VERSION == 5
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//why? TODO : CHECK by KD8CEC
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//initializing the ppl2 as well
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i2cWriten(34, si5351Val, 8); // Write to 8 PLLA msynth regs
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i2cWrite(177, 0xa0); // Reset PLLA & PPLB (0x80 resets PLLB)
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#else
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//
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#endif
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}
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void si5351bx_setfreq(uint8_t clknum, uint32_t fout) { // Set a CLK to fout Hz
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uint32_t msa, msb, msc, msxp1, msxp2, msxp3p2top;
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if ((fout < 500000) || (fout > 109000000)) // If clock freq out of range
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si5351bx_clken |= 1 << clknum; // shut down the clock
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else {
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msa = si5351bx_vcoa / fout; // Integer part of vco/fout
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msb = si5351bx_vcoa % fout; // Fractional part of vco/fout
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msc = fout; // Divide by 2 till fits in reg
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while (msc & 0xfff00000) {
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msb = msb >> 1;
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msc = msc >> 1;
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}
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msxp1 = (128 * msa + 128 * msb / msc - 512) | (((uint32_t)si5351bx_rdiv) << 20);
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msxp2 = 128 * msb - 128 * msb / msc * msc; // msxp3 == msc;
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msxp3p2top = (((msc & 0x0F0000) << 4) | msxp2); // 2 top nibbles
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uint8_t vals[8] = { BB1(msc), BB0(msc), BB2(msxp1), BB1(msxp1),
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BB0(msxp1), BB2(msxp3p2top), BB1(msxp2), BB0(msxp2)
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};
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i2cWriten(42 + (clknum * 8), vals, 8); // Write to 8 msynth regs
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i2cWrite(16 + clknum, 0x0C | si5351bx_drive[clknum]); // use local msynth
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si5351bx_clken &= ~(1 << clknum); // Clear bit to enable clock
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}
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i2cWrite(3, si5351bx_clken); // Enable/disable clock
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}
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void si5351_set_calibration(int32_t cal){
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si5351bx_vcoa = (SI5351BX_XTAL * SI5351BX_MSA) + cal; // apply the calibration correction factor
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si5351bx_setfreq(0, usbCarrier);
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}
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void SetCarrierFreq()
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{
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unsigned long appliedCarrier = ((cwMode == 0 ? usbCarrier : cwmCarrier) + (isIFShift && (inTx == 0) ? ifShiftValue : 0));
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//si5351bx_setfreq(0, (sdrModeOn ? 0 : appliedCarrier));
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si5351bx_setfreq(0, ((sdrModeOn && (inTx == 0)) ? 0 : appliedCarrier)); //found bug by KG4GEK
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/*
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if (cwMode == 0)
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si5351bx_setfreq(0, usbCarrier + (isIFShift ? ifShiftValue : 0));
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else
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si5351bx_setfreq(0, cwmCarrier + (isIFShift ? ifShiftValue : 0));
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*/
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}
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void initOscillators(){
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//initialize the SI5351
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si5351bx_init();
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si5351bx_vcoa = (SI5351BX_XTAL * SI5351BX_MSA) + calibration; // apply the calibration correction factor
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SetCarrierFreq();
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}
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//============================================================
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// ADD FUNCTIONS by KD8CEC
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//============================================================
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uint8_t Wspr_Reg1[8] = {0xFF,0xFE, 0x00, 0, 0, 0, 0, 0}; //3, 4, 5, 6, 7
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uint8_t Wspr_Reg2[8] = {0, 1, 0, 0, 0, 0, 0, 0}; //2, 3, 4
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void Set_WSPR_Param(void)
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{
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i2cWrite(18, 128);
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i2cWriten(34, Wspr_Reg1, 8);
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i2cWriten(58, Wspr_Reg2, 8);
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i2cWrite(177, 128);
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i2cWrite(18, 111);
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si5351bx_clken &= ~(1 << 2);
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i2cWrite(3, si5351bx_clken);
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}
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void TXSubFreq(unsigned long P2)
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{
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i2cWrite(40, (P2 & 65280) >> 8);
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i2cWrite(41, P2 & 255);
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}
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