mirror of
https://github.com/rfivet/stm32bringup.git
synced 2024-12-18 06:46:23 -05:00
DHT11 humidity and temperature sensor sampling.
This commit is contained in:
parent
9e080f1740
commit
788c5c5b3b
3
Makefile
3
Makefile
@ -36,7 +36,8 @@ PROJECT = f030f4
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#SRCS = startup.c uplow.2.c uptime.c
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#SRCS = startup.c uplow.2.c hello.c
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#SRCS = startup.c clocks.c uptime.c
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SRCS = startup.txeie.c txeie.c uptime.c
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#SRCS = startup.txeie.c txeie.c uptime.c
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SRCS = startup.txeie.c gpioa.c dht11main.c dht11.c
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OBJS = $(SRCS:.c=.o)
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LIBOBJS = printf.o putchar.o puts.o
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CPU = -mthumb -mcpu=cortex-m0
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93
dht11.c
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93
dht11.c
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@ -0,0 +1,93 @@
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/* dht11.c -- DHT11 humidity and temperature sensor reading */
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/* Copyright (c) 2020 Renaud Fivet */
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#include "dht11.h" /* implements DHT11 API */
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#include "system.h" /* usleep(), gpioa_*() */
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#define DIO 13
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#define dht11_input() gpioa_input( DIO)
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#define dht11_output() gpioa_output( DIO)
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#define dht11_bread() gpioa_read( DIO)
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#define MAX_RETRIES 200 /* at 48 MHz, 160 retries for 80 us HIGH */
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#define is_not_LOW( a) a != LOW
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#define is_not_HIGH( a) a == LOW
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#define wait_level( lvl) \
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retries = MAX_RETRIES ; \
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while( is_not_##lvl( dht11_bread())) \
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if( retries-- == 0) \
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return DHT11_FAIL_TOUT
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/* 5 .. 95 %RH, -20 .. 60 C */
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unsigned char dht11_humid ; /* 5 .. 95 %RH */
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signed char dht11_tempc ; /* -20 .. 60 C */
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unsigned char dht11_tempf ; /* .0 .. .9 C */
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void dht11_init( void) {
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/* At startup A13 is ALT DIO with Pull Up enabled */
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dht11_input() ;
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}
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dht11_retv_t dht11_read( void) {
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unsigned char values[ 5] ;
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/* Host START: pulls line down for > 18ms then release line, pull-up raises to HIGH */
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dht11_output() ;
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usleep( 18000) ;
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dht11_input() ;
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/* DHT START: takes line, 80us low then 80us high */
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int retries ; /* retry counter */
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wait_level( LOW) ; /* HIGH -> LOW, starts 80us low */
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wait_level( HIGH) ; /* LOW -> HIGH, ends 80us low, starts 80us high */
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/* DHT transmits 40 bits, high bit first
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* 0 coded as 50us low then 26~28us high
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* 1 coded as 50us low then 70us high
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*/
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wait_level( LOW) ; /* HIGH -> LOW, ends, 80us high, starts 50us low */
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int threshold = (MAX_RETRIES + retries) / 2 ;
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unsigned char sum = 0 ;
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unsigned char v = 0 ;
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for( int idx = 0 ; idx <= 4 ; idx += 1) {
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sum += v ;
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v = 0 ;
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for( unsigned char curbit = 128 ; curbit ; curbit >>= 1) {
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/* Measure duration of HIGH level */
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wait_level( HIGH) ; /* LOW -> HIGH, ends 50us low, starts timed high */
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wait_level( LOW) ; /* HIGH -> LOW, timed high ends, starts 50us low */
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/* Set bit based on measured HIGH duration */
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if( retries < threshold) /* 0 == 26~28us, 1 == 70us */
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v |= curbit ;
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}
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values[ idx] = v ;
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}
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/* DHT STOP: releases line after 50us, pull-up raises to HIGH */
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wait_level( HIGH) ; /* LOW -> HIGH, ends 50us low, DHT has released the line */
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if( sum != values[ 4])
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return DHT11_FAIL_CKSUM ;
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dht11_humid = values[ 0] ;
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dht11_tempc = values[ 2] ;
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dht11_tempf = values[ 3] ;
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if( dht11_tempf & 0x80) {
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dht11_tempc *= -1 ;
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dht11_tempf = 10 - ( dht11_tempf & 0x7F) ;
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if( dht11_tempf == 10) {
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dht11_tempc -= 1 ;
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dht11_tempf = 0 ;
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}
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}
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return DHT11_SUCCESS ;
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}
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/* end of file dht11.c */
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20
dht11.h
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20
dht11.h
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@ -0,0 +1,20 @@
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/* dht11.h -- DHT11 API */
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/* Copyright (c) 2020 Renaud Fivet */
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typedef enum {
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DHT11_SUCCESS,
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DHT11_FAIL_TOUT,
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DHT11_FAIL_CKSUM
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} dht11_retv_t ;
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/* 5 .. 95 %RH, -20 .. 60 C */
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extern unsigned char dht11_humid ; /* 5 .. 95 %RH */
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extern signed char dht11_tempc ; /* -20 .. 60 C */
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extern unsigned char dht11_tempf ; /* .0 .. .9 C */
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void dht11_init( void) ;
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dht11_retv_t dht11_read( void) ;
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/* end of dht11.h */
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31
dht11main.c
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31
dht11main.c
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@ -0,0 +1,31 @@
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/* dht11main.c -- sample DHT11 sensor */
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/* Copyright (c) 2020 Renaud Fivet */
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#include <stdio.h>
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#include "system.h"
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#include "dht11.h"
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int main() {
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static unsigned last ;
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dht11_init() ;
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for( ;;)
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if( last == uptime)
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yield() ;
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else {
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last = uptime ;
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if( 2 == (last % 5)) /* every 5 seconds starting 2s after boot */
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switch( dht11_read()) {
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case DHT11_SUCCESS:
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printf( "%u%%RH, %d.%uC\n", dht11_humid, dht11_tempc, dht11_tempf) ;
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break ;
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case DHT11_FAIL_TOUT:
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puts( "Timeout") ;
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break ;
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case DHT11_FAIL_CKSUM:
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puts( "Cksum error") ;
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}
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}
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}
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/* end of dht11main.c */
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288
gpioa.c
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288
gpioa.c
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@ -0,0 +1,288 @@
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/* gpioa.c -- system layer
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** Copyright (c) 2020 Renaud Fivet
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**
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** gpioa low level API and usleep()
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** interrupt based serial transmission
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** clocks configuration: HSI, HSE, PLL HSI, PLL HSE
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** implements system.h interface: uptime, init(), kputc(), kputs(), yield()
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** uptime = seconds elapsed since boot
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** Serial tx, SysClck 8MHz HSI based, baudrate 9600, Busy wait transmission
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** user LED toggled every second
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** SysTick interrupt every second
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*/
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#include "system.h" /* implements system.h */
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/** CORE **********************************************************************/
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#define SYSTICK ((volatile unsigned long *) 0xE000E010)
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#define SYSTICK_CSR SYSTICK[ 0]
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#define SYSTICK_RVR SYSTICK[ 1]
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#define SYSTICK_CVR SYSTICK[ 2]
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#define NVIC ((volatile long *) 0xE000E100)
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#define NVIC_ISER NVIC[ 0]
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#define unmask_irq( idx) NVIC_ISER = 1 << idx
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#define USART1_IRQ_IDX 27
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/** PERIPH ********************************************************************/
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#define CAT( a, b) a##b
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#define RCC ((volatile long *) 0x40021000)
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#define RCC_CR RCC[ 0]
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#define RCC_CR_HSION 0x00000001 /* 1: Internal High Speed clock enable */
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#define RCC_CR_HSEON 0x00010000 /* 16: External High Speed clock enable */
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#define RCC_CR_HSERDY 0x00020000 /* 17: External High Speed clock ready flag */
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#define RCC_CR_PLLON 0x01000000 /* 24: PLL enable */
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#define RCC_CR_PLLRDY 0x02000000 /* 25: PLL clock ready flag */
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#define RCC_CFGR RCC[ 1]
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#define RCC_CFGR_SW_MSK 0x00000003 /* 1-0: System clock SWitch Mask */
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#define RCC_CFGR_SW_HSE 0x00000001 /* 1-0: Switch to HSE as system clock */
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#define RCC_CFGR_SW_PLL 0x00000002 /* 1-0: Switch to PLL as system clock */
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#define RCC_CFGR_SWS_MSK 0x0000000C /* 3-2: System clock SWitch Status Mask */
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#define RCC_CFGR_SWS_HSE 0x00000004 /* 3-2: HSE used as system clock */
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#define RCC_CFGR_SWS_PLL 0x00000008 /* 3-2: PLL used as system clock */
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#define RCC_CFGR_PLLSRC 0x00010000
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#define RCC_CFGR_PLLSRC_HSI 0x00000000 /* HSI / 2 */
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#define RCC_CFGR_PLLSRC_HSE 0x00010000 /* HSE */
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#define RCC_CFGR_PLLXTPRE 0x00020000
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#define RCC_CFGR_PLLXTPRE_DIV1 0x00000000 /* HSE */
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#define RCC_CFGR_PLLXTPRE_DIV2 0x00020000 /* HSE / 2 */
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#define RCC_CFGR_PLLMUL_MSK (0x00F << 18)
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#define RCC_CFGR_PLLMUL( v) ((v - 2) << 18)
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#define RCC_AHBENR RCC[ 5]
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#define RCC_AHBENR_IOPn( n) (1 << (17 + n))
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#define RCC_AHBENR_IOPh( h) RCC_AHBENR_IOPn( CAT( 0x, h) - 0xA)
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#define RCC_APB2ENR RCC[ 6]
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#define RCC_APB2ENR_USART1EN 0x00004000 /* 14: USART1 clock enable */
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#define GPIOA ((volatile long *) 0x48000000)
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#define GPIOB ((volatile long *) 0x48000400)
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#define GPIO( x) CAT( GPIO, x)
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#define MODER 0
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#define IDR 4
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#define ODR 5
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#define AFRH 9
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#define USART1 ((volatile long *) 0x40013800)
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#define CR1 0 /* Config Register */
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#define BRR 3 /* BaudRate Register */
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#define ISR 7 /* Interrupt and Status Register */
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#define TDR 10 /* Transmit Data Register*/
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#define USART_CR1_TXEIE (1 << 7) /* 7: TDR Empty Interrupt Enable */
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#define USART_CR1_TE 8 /* 3: Transmit Enable */
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#define USART_CR1_RE 4 /* 2: Receive Enable */
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#define USART_CR1_UE 1 /* 0: USART Enable */
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#define USART_ISR_TXE (1 << 7) /* 7: Transmit Data Register Empty */
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/* user LED ON when PA4 is low */
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#define LED_IOP A
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#define LED_PIN 4
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#define LED_ON 0
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/* 8MHz quartz, configure PLL at 24MHz */
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#define HSE 8000000
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#define PLL 6
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#define BAUD 9600
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#ifdef PLL
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# ifdef HSE
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# define CLOCK HSE / 2 * PLL
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# else /* HSI */
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# define CLOCK 8000000 / 2 * PLL
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# endif
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# if CLOCK < 16000000
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# error PLL output below 16MHz
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# endif
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#elif defined( HSE)
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# define CLOCK HSE
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#else /* HSI */
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# define CLOCK 8000000
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#endif
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#if CLOCK > 48000000
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# error clock frequency exceeds 48MHz
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#endif
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#if CLOCK % BAUD
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# warning baud rate not accurate at that clock frequency
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#endif
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static unsigned char txbuf[ 8] ; // best if size is a power of 2 for cortex-M0
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#define TXBUF_SIZE (sizeof txbuf / sizeof txbuf[ 0])
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static unsigned char txbufin ;
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static volatile unsigned char txbufout ;
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void USART1_Handler( void) {
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if( txbufout == txbufin) {
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/* Empty buffer => Disable TXEIE */
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USART1[ CR1] &= ~USART_CR1_TXEIE ;
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} else {
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static unsigned char lastc ;
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unsigned char c ;
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c = txbuf[ txbufout] ;
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if( c == '\n' && lastc != '\r')
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c = '\r' ;
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else
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txbufout = (txbufout + 1) % TXBUF_SIZE ;
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USART1[ TDR] = c ;
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lastc = c ;
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}
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}
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void kputc( unsigned char c) { /* character output */
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int nextidx ;
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/* Wait if buffer full */
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nextidx = (txbufin + 1) % TXBUF_SIZE ;
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while( nextidx == txbufout)
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yield() ;
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txbuf[ txbufin] = c ;
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txbufin = nextidx ;
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/* Trigger transmission by enabling interrupt */
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USART1[ CR1] |= USART_CR1_TXEIE ;
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}
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int kputs( const char s[]) { /* string output */
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int cnt = 0 ;
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int c ;
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while( (c = *s++) != 0) {
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kputc( c) ;
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cnt += 1 ;
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}
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return cnt ;
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}
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void yield( void) { /* give way */
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__asm( "WFI") ; /* Wait for System Tick Interrupt */
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}
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volatile unsigned uptime ; /* seconds elapsed since boot */
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#ifdef LED_ON
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static void userLEDtoggle( void) {
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GPIO( LED_IOP)[ ODR] ^= 1 << LED_PIN ; /* Toggle User LED */
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}
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#endif
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void SysTick_Handler( void) {
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uptime += 1 ;
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#ifdef LED_ON
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userLEDtoggle() ;
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#endif
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}
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void usleep( unsigned usecs) { /* wait at least usec µs */
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#if CLOCK / 8000000 < 1
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# error HCLK below 8 MHz
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#endif
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usecs = SYSTICK_CVR - (CLOCK / 8000000 * usecs) ;
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while( SYSTICK_CVR > usecs) ;
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}
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/* GPIOA low level API ********************************************************/
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void gpioa_input( int pin) { /* Configure GPIOA pin as input */
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GPIOA[ MODER] &= ~(3 << (pin * 2)) ; /* Apin as input [00] */
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}
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void gpioa_output( int pin) { /* Configure GPIOA pin as output */
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GPIOA[ MODER] |= 1 << (pin * 2) ; /* Apin output (over [00]) */
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}
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iolvl_t gpioa_read( int pin) { /* Read level of GPIOA pin */
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return LOW != (GPIOA[ IDR] & (1 << pin)) ;
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}
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int init( void) {
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/* By default SYSCLK == HSI [8MHZ] */
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#ifdef HSE
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/* Start HSE clock (8 MHz external oscillator) */
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RCC_CR |= RCC_CR_HSEON ;
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/* Wait for oscillator to stabilize */
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do {} while( (RCC_CR & RCC_CR_HSERDY) == 0) ;
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#endif
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#ifdef PLL
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/* Setup PLL HSx/2 * 6 [24MHz] */
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/* Default 0: PLL HSI/2 src, PLL MULL * 2 */
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RCC_CFGR =
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# ifdef HSE
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RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_DIV2 |
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# endif
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RCC_CFGR_PLLMUL( PLL) ;
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RCC_CR |= RCC_CR_PLLON ;
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do {} while( (RCC_CR & RCC_CR_PLLRDY) == 0) ; /* Wait for PLL */
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/* Switch to PLL as system clock SYSCLK == PLL [24MHz] */
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RCC_CFGR = (RCC_CFGR & ~RCC_CFGR_SW_MSK) | RCC_CFGR_SW_PLL ;
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do {} while( (RCC_CFGR & RCC_CFGR_SWS_MSK) != RCC_CFGR_SWS_PLL) ;
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#elif defined( HSE)
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/* Switch to HSE as system clock SYSCLK == HSE [8MHz] */
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RCC_CFGR = (RCC_CFGR & ~RCC_CFGR_SW_MSK) | RCC_CFGR_SW_HSE ;
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do {} while( (RCC_CFGR & RCC_CFGR_SWS_MSK) != RCC_CFGR_SWS_HSE) ;
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#endif
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#ifdef HSE
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/* Switch off HSI */
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RCC_CR &= ~RCC_CR_HSION ;
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#endif
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/* SYSTICK */
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SYSTICK_RVR = CLOCK / 8 - 1 ; /* HBA / 8 */
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SYSTICK_CVR = 0 ;
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SYSTICK_CSR = 3 ; /* HBA / 8, Interrupt ON, Enable */
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/* SysTick_Handler will execute every 1s from now on */
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#ifdef LED_ON
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/* User LED ON */
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RCC_AHBENR |= RCC_AHBENR_IOPh( LED_IOP) ; /* Enable IOPx periph */
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GPIO( LED_IOP)[ MODER] |= 1 << (LED_PIN * 2) ; /* LED_IO Output [01],
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** over default 00 */
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/* OTYPER Push-Pull by default */
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/* Pxn output default LOW at reset */
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# if LED_ON
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userLEDtoggle() ;
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# endif
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#endif
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/* USART1 9600 8N1 */
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RCC_AHBENR |= RCC_AHBENR_IOPh( A) ; /* Enable GPIOA periph */
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GPIOA[ MODER] |= 0x0A << (9 * 2) ; /* PA9-10 ALT 10, over default 00 */
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GPIOA[ AFRH] |= 0x110 ; /* PA9-10 AF1 0001, over default 0000 */
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RCC_APB2ENR |= RCC_APB2ENR_USART1EN ;
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USART1[ BRR] = CLOCK / BAUD ; /* PCLK is default source */
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USART1[ CR1] |= USART_CR1_UE | USART_CR1_TE ; /* Enable USART & Tx */
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/* Unmask USART1 irq */
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unmask_irq( USART1_IRQ_IDX) ;
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kputs(
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#ifdef PLL
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"PLL"
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#endif
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#ifdef HSE
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"HSE"
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#else
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"HSI"
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#endif
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"\n") ;
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return 0 ;
|
||||
}
|
||||
|
||||
/* end of gpioa.c */
|
||||
13
system.h
13
system.h
@ -9,4 +9,17 @@ void kputc( unsigned char c) ; /* character output */
|
||||
int kputs( const char s[]) ; /* string output */
|
||||
void yield( void) ; /* give way */
|
||||
|
||||
/* GPIOA low level API ********************************************************/
|
||||
|
||||
typedef enum {
|
||||
LOW = 0,
|
||||
HIGH
|
||||
} iolvl_t ;
|
||||
|
||||
void gpioa_input( int pin) ; /* Configure GPIOA pin as input */
|
||||
void gpioa_output( int pin) ; /* Configure GPIOA pin as output */
|
||||
iolvl_t gpioa_read( int pin) ; /* Read level of GPIOA pin */
|
||||
|
||||
void usleep( unsigned usecs) ; /* wait at least usecs us */
|
||||
|
||||
/* end of system.h */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user