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5 Commits

Author SHA1 Message Date
jasper
a7faf7b4f3 - update to myhdl-0.11 
- switch to python 3
 2020-08-03 06:38:00 +00:00
jasper
1e358a6c83 - update to myhdl-0.9.0 
- switch to pypi
 2015-12-20 09:34:16 +00:00
jasper
4e74647987 update to myhdl-0.8.1 2014-09-27 17:41:20 +00:00
jasper
b2255a1484 update to myhdl-0.8 2013-08-06 18:11:40 +00:00
jasper
a5dcdfacc2 import myhdl 0.7 
MyHDL is an open source Python package that lets you go from Python to
silicon. With MyHDL, you can use Python as a hardware description and
verification language. Furthermore, you can convert MyHDL code, that was
developed towards implementation, to Verilog and VHDL automatically, and
take it to a silicon implementation from there.

ok landry@
 2011-09-16 13:46:13 +00:00