freebsd-ports/cad
Yuri Victorovich 033b81b2c4 cad/veryl: Update 0.1.3 -> 0.1.8
Reported by:	portscout
2023-01-09 23:59:55 -08:00
..
abc
admesh
adms
alliance Mk/**tex.mk: Convert bsd.tex.mk to USES=tex 2022-12-19 08:44:58 -06:00
appcsxcad
archimedes
astk-client
astk-serveur
atlc
brlcad
calculix
calculix-ccx
camotics
caneda
cascade
cascade-compiler
chipvault
csxcad
cura
cura-engine
cvc
digital
dinotrace
ecpprog
electric
electric-ng
fasm
fdm_materials
feappv
fidocadj
freecad cad/freecad: fix desktop integration 2023-01-02 15:11:11 +03:00
freehdl
fritzing
gds3d
gdsreader
gdt
geda
gerbv
gmsh
gnucap
gplcver
graywolf
gspiceui
gtkwave
horizon-eda
ifcopenshell
impact
irsim cad/irsim: Update to 9.7.116 2022-12-27 20:05:07 +00:00
iverilog
jspice3
k40-whisperer
kicad
kicad-devel cad/kicad-devel: Update to the latest commit 2023-01-08 17:20:28 +01:00
kicad-doc
kicad-library-footprints
kicad-library-footprints-devel cad/kicad-library-*-devel: Update to the latest commits 2023-01-08 17:39:15 +01:00
kicad-library-packages3d
kicad-library-packages3d-devel cad/kicad-library-*-devel: Update to the latest commits 2023-01-08 17:39:15 +01:00
kicad-library-symbols
kicad-library-symbols-devel cad/kicad-library-*-devel: Update to the latest commits 2023-01-08 17:39:15 +01:00
kicad-library-templates
kicad-library-templates-devel cad/kicad-library-*-devel: Update to the latest commits 2023-01-08 17:39:15 +01:00
klayout cad/klayout: Update to 0.28.2 2023-01-03 01:08:41 +09:00
ktechlab
ldraw
ldview
leocad
lepton-eda
libgdsii
libopencad
librecad
libredwg
librepcb
librnd
logisim
magic
meshdev
meshlab
NASTRAN-95
netgen
netgen-lvs
ngspice_rework cad/ngspice_rework: fix packaging 2023-01-09 22:21:04 +01:00
nvc
opencascade Mk/**tex.mk: Convert bsd.tex.mk to USES=tex 2022-12-19 08:44:58 -06:00
opencascade740 Mk/**tex.mk: Convert bsd.tex.mk to USES=tex 2022-12-19 08:44:58 -06:00
openctm
openfpgaloader cad/openfpgaloader: Update 0.9.1 -> 0.10.0 2022-12-22 19:37:11 -08:00
openroad cad/openroad: Fix with libfmt >= 9 2022-12-22 11:35:57 -08:00
openscad cad/openscad: Update to 2021.01.01-20221206 (current revision) 2022-12-21 20:24:13 +01:00
openscad-devel cad/openscad-devel: Update to current 2022.12.20 2022-12-21 21:07:09 +01:00
opentimer
openvsp
oregano
p5-GDS2
p5-Verilog-Perl
padring
pcb
pcb-rnd
pdnmesh
PrusaSlicer
py-cadquery
py-cq-editor
py-edalize cad/py-edalize: New port: Library for interfacing EDA tools 2023-01-08 01:40:50 -08:00
py-ezdxf
py-gdspy
py-gmsh cad/py-gmsh: Update 4.11.0 -> 4.11.1 2022-12-23 01:15:16 -08:00
py-lcapy
py-ocp
py-phidl
py-pyfda
py-pygmsh cad/py-pygmsh: New port: Python frontend for Gmsh (on top of Gmsh's own binding) 2022-12-20 00:13:24 -08:00
py-pymtl
py-vunit-hdl cad/py-vunit-hdl: New pert: Open source unit testing framework for VHDL/SystemVerilog 2023-01-08 01:40:50 -08:00
python-gdsii
qcad
qcsxcad
qelectrotech cad/qelectrotech: Update to 0.9.0 2023-01-07 13:42:46 +03:00
qflow
qmls
qrouter
qucs-s
qucsator
repsnapper
rubygem-gdsii
scotch
silice cad/silice: New port: Language that simplifies prototyping and writing algorithms for FPGAs 2023-01-08 01:40:50 -08:00
solvespace
sp2sp
spice
stepcode
stm32flash
sumo
surelog
svlint */*: Bump rust (cargo) ports to reflect on WITH_LTO 2023-01-07 20:24:18 +01:00
svls */*: Bump rust (cargo) ports to reflect on WITH_LTO 2023-01-07 20:24:18 +01:00
sweethome3d
tkgate
tochnog
uhdm
uranium
verilator cad/verilator: Update 5.002 -> 5.004 2022-12-26 23:50:59 -08:00
verilog-mode.el
veroroute
veryl cad/veryl: Update 0.1.3 -> 0.1.8 2023-01-09 23:59:55 -08:00
xcircuit
xyce
yosys cad/yosys: Update 0.24 -> 0.25 2023-01-04 14:12:01 -08:00
z88
zcad
Makefile cad/silice: New port: Language that simplifies prototyping and writing algorithms for FPGAs 2023-01-08 01:40:50 -08:00