freebsd-ports/cad
Yuri Victorovich 555a0a9384 cad/veryl: Update 0.2.0 -> 0.2.1
Reported by:	portscout
2023-01-19 10:03:28 -08:00
..
abc
admesh
adms
alliance
antimony cad/antimony: New port: CAD from a parallel universe 2023-01-16 13:07:26 -08:00
appcsxcad
archimedes
astk-client
astk-serveur
atlc
brlcad
calculix
calculix-ccx
camotics
caneda
cascade
cascade-compiler
chipvault
csxcad */*: bump libboost*.so libraries consumert after Boost upgrade 2023-01-16 22:32:07 +03:00
cura
cura-engine
cvc
digital
dinotrace
ecpprog
electric
electric-ng
fasm
fdm_materials
feappv
fidocadj
freecad cad/freecad: fix desktop integration 2023-01-02 15:11:11 +03:00
freehdl
fritzing
gds3d
gdsreader
gdt
geda
gerbv
gmsh
gnucap
gplcver
graywolf
gspiceui
gtkwave
horizon-eda
ifcopenshell
impact
irsim
iverilog
jspice3
k40-whisperer
kicad
kicad-devel cad/kicad-devel: Update to the latest commit 2023-01-08 17:20:28 +01:00
kicad-doc
kicad-library-footprints
kicad-library-footprints-devel cad/kicad-library-*-devel: Update to the latest commits 2023-01-08 17:39:15 +01:00
kicad-library-packages3d
kicad-library-packages3d-devel cad/kicad-library-*-devel: Update to the latest commits 2023-01-08 17:39:15 +01:00
kicad-library-symbols
kicad-library-symbols-devel cad/kicad-library-*-devel: Update to the latest commits 2023-01-08 17:39:15 +01:00
kicad-library-templates
kicad-library-templates-devel cad/kicad-library-*-devel: Update to the latest commits 2023-01-08 17:39:15 +01:00
klayout Mk/**ruby.mk: Switch from USE_RUBY=yes to USES=ruby 2023-01-14 17:08:33 -06:00
ktechlab
ldraw
ldview
leocad
lepton-eda
libgdsii
libopencad
librecad
libredwg
librepcb
librnd
logisim
magic
meshdev
meshlab
NASTRAN-95
netgen cad/netgen: Update to 6.2.2031 2023-01-11 15:25:53 -06:00
netgen-lvs
ngspice_rework cad/ngspice_rework: fix packaging 2023-01-09 22:21:04 +01:00
nvc
opencascade
opencascade740
openctm
openfpgaloader
openroad
openscad */*: bump libboost*.so libraries consumert after Boost upgrade 2023-01-16 22:32:07 +03:00
openscad-devel
opentimer
openvsp
oregano
p5-GDS2
p5-Verilog-Perl
padring
pcb
pcb-rnd
pdnmesh
PrusaSlicer */*: bump libboost*.so libraries consumert after Boost upgrade 2023-01-16 22:32:07 +03:00
py-cadquery
py-cq-editor
py-edalize */*: rename CHEESESHOP to PYPI in MASTER_SITES 2023-01-11 18:58:34 +03:00
py-ezdxf
py-gdspy
py-gmsh
py-lcapy
py-ocp
py-phidl
py-pyfda */*: rename CHEESESHOP to PYPI in MASTER_SITES 2023-01-11 18:58:34 +03:00
py-pygmsh */*: rename CHEESESHOP to PYPI in MASTER_SITES 2023-01-11 18:58:34 +03:00
py-pymtl */*: rename CHEESESHOP to PYPI in MASTER_SITES 2023-01-11 18:58:34 +03:00
py-vunit-hdl */*: rename CHEESESHOP to PYPI in MASTER_SITES 2023-01-11 18:58:34 +03:00
python-gdsii */*: rename CHEESESHOP to PYPI in MASTER_SITES 2023-01-11 18:58:34 +03:00
qcad
qcsxcad
qelectrotech cad/qelectrotech: Update to 0.9.0 2023-01-07 13:42:46 +03:00
qflow
qmls
qrouter
qucs-s
qucsator
repsnapper
rubygem-gdsii Mk/**ruby.mk: Switch from USE_RUBY=yes to USES=ruby 2023-01-14 17:08:33 -06:00
scotch
silice cad/silice: New port: Language that simplifies prototyping and writing algorithms for FPGAs 2023-01-08 01:40:50 -08:00
solvespace
sp2sp
spice
stepcode
stm32flash
sumo graphics/proj: Update to 9.1.1 2023-01-18 15:48:50 +01:00
surelog
svlint */*: Bump rust (cargo) ports to reflect on WITH_LTO 2023-01-07 20:24:18 +01:00
svls */*: Bump rust (cargo) ports to reflect on WITH_LTO 2023-01-07 20:24:18 +01:00
sweethome3d
tkgate
tochnog
uhdm
uranium
verilator
verilog-mode.el
veroroute
veryl cad/veryl: Update 0.2.0 -> 0.2.1 2023-01-19 10:03:28 -08:00
xcircuit
xyce math/suitesparse*: bump PORTREVISION of dependant ports 2023-01-19 17:45:37 +01:00
yosys cad/yosys: Update 0.24 -> 0.25 2023-01-04 14:12:01 -08:00
z88
zcad
Makefile cad/antimony: New port: CAD from a parallel universe 2023-01-16 13:07:26 -08:00