e7e43727ce
* gnu/packages/patches/gcc-arm-bug-71399.patch: New file. * gnu/local.mk (dist_patch_DATA): Add it. * gnu/packages/gcc.scm (gcc-4.9)[source]: Use it.
56 lines
2.0 KiB
Diff
56 lines
2.0 KiB
Diff
Revert the following commit to work around a bootstrap comparison failure on
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ARMv7, as reported at <https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71399>.
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commit f6ab85b7049a03962ea98924d00802da357a1ad3
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Author: renlin <renlin@138bc75d-0d04-0410-961f-82ee72b054a4>
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Date: Wed Dec 2 14:06:31 2015 +0000
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[PR67383][ARM][4.9]Backport of "Allow any register for DImode values in Thumb2"
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This partially fix PR67383. It allows the reload more flexibility to choose
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spilling pseudo registers.
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gcc/ChangeLog:
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2015-12-02 Renlin Li <renlin.li@arm.com>
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Backport from mainline.
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2014-04-22 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
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* config/arm/arm.c (arm_hard_regno_mode_ok): Loosen
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restrictions on core registers for DImode values in Thumb2.
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@231177 138bc75d-0d04-0410-961f-82ee72b054a4
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diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
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index 8ba6060..d9028a1 100644
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--- b/gcc/config/arm/arm.c
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+++ a/gcc/config/arm/arm.c
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@@ -22624,19 +22624,12 @@
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}
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/* We allow almost any value to be stored in the general registers.
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- Restrict doubleword quantities to even register pairs in ARM state
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- so that we can use ldrd. Do not allow very large Neon structure
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- opaque modes in general registers; they would use too many. */
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+ Restrict doubleword quantities to even register pairs so that we can
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+ use ldrd. Do not allow very large Neon structure opaque modes in
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+ general registers; they would use too many. */
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if (regno <= LAST_ARM_REGNUM)
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- {
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- if (ARM_NUM_REGS (mode) > 4)
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- return FALSE;
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-
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- if (TARGET_THUMB2)
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- return TRUE;
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-
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- return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0);
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- }
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+ return !(TARGET_LDRD && GET_MODE_SIZE (mode) > 4 && (regno & 1) != 0)
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+ && ARM_NUM_REGS (mode) <= 4;
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if (regno == FRAME_POINTER_REGNUM
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|| regno == ARG_POINTER_REGNUM)
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