Original submission from Alessandro De Laurenzis, who takes MAINTAINER -- thanks! Additional work from sthen@ and myself, ok sthen@ ABC is a growing software system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. ABC combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification.
3 lines
82 B
Plaintext
3 lines
82 B
Plaintext
@comment $OpenBSD: PLIST,v 1.1.1.1 2018/08/08 15:24:47 bcallah Exp $
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@bin bin/abc
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