53 lines
1.9 KiB
Plaintext
53 lines
1.9 KiB
Plaintext
Add retguard for octeon/mips64.
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Index: lib/Target/Mips/MipsReturnProtectorLowering.h
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--- lib/Target/Mips/MipsReturnProtectorLowering.h.orig
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+++ lib/Target/Mips/MipsReturnProtectorLowering.h
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@@ -0,0 +1,46 @@
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+//===-- MipsReturnProtectorLowering.h - --------------------- -*- C++ -*-==//
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+//
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+// The LLVM Compiler Infrastructure
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+//
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+// This file is distributed under the University of Illinois Open Source
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+// License. See LICENSE.TXT for details.
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+//
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+//===----------------------------------------------------------------------===//
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+//
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+// This file contains the Mips implementation of ReturnProtectorLowering
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+// class.
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+//
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+//===----------------------------------------------------------------------===//
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+
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+#ifndef LLVM_LIB_TARGET_MIPS_MIPSRETURNPROTECTORLOWERING_H
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+#define LLVM_LIB_TARGET_MIPS_MIPSRETURNPROTECTORLOWERING_H
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+
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+#include "llvm/CodeGen/ReturnProtectorLowering.h"
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+
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+namespace llvm {
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+
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+class MipsReturnProtectorLowering : public ReturnProtectorLowering {
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+public:
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+ /// insertReturnProtectorPrologue/Epilogue - insert return protector
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+ /// instrumentation in prologue or epilogue.
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+ virtual void
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+ insertReturnProtectorPrologue(MachineFunction &MF, MachineBasicBlock &MBB,
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+ GlobalVariable *cookie) const override;
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+ virtual void
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+ insertReturnProtectorEpilogue(MachineFunction &MF, MachineInstr &MI,
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+ GlobalVariable *cookie) const override;
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+
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+ /// opcodeIsReturn - Reuturn true is the given opcode is a return
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+ /// instruction needing return protection, false otherwise.
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+ virtual bool opcodeIsReturn(unsigned opcode) const override;
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+
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+ /// fillTempRegisters - Fill the list of available temp registers we can
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+ /// use as a return protector register.
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+ virtual void
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+ fillTempRegisters(MachineFunction &MF,
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+ std::vector<unsigned> &TempRegs) const override;
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+};
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+
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+} // namespace llvm
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+
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+#endif
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