f919501846
Original submission from Alessandro De Laurenzis, who takes MAINTAINER -- thanks! Additional work from sthen@ and myself, ok sthen@ ABC is a growing software system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. ABC combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification.
6 lines
372 B
Plaintext
6 lines
372 B
Plaintext
ABC is a growing software system for synthesis and verification of binary
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sequential logic circuits appearing in synchronous hardware designs. ABC
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combines scalable logic optimization based on And-Inverter Graphs (AIGs),
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optimal-delay DAG-based technology mapping for look-up tables and standard
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cells, and innovative algorithms for sequential synthesis and verification.
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