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openbsd-ports/palm/pose/patches/patch-SrcShared_Hardware_EmRegs328_cpp
mbalmer b5b2fd51f0 Palm OS Emulator 
ok pvalchev
2006-10-19 16:24:51 +00:00

210 lines
9.7 KiB
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$OpenBSD: patch-SrcShared_Hardware_EmRegs328_cpp,v 1.1.1.1 2006/10/19 16:24:51 mbalmer Exp $
--- SrcShared/Hardware/EmRegs328.cpp.orig Fri Mar 29 14:11:18 2002
+++ SrcShared/Hardware/EmRegs328.cpp Thu Oct 19 17:26:39 2006
@@ -97,13 +97,13 @@ static const uint32 ADDRESS_MASK = 0x000
const HwrM68328Type kInitial68328RegisterValues =
{
0x0C, // Byte scr; // $000: System Control Register
- { 0 }, // Byte ___filler0[0x004-0x001];
+ 0, // Byte ___filler0[0x004-0x001];
// The following ID stuff is not present on earlier chips (before ??)
hwr328chipID328, // Byte chipID; // $004: Chip ID Register
hwr328maskID1H58B, // Byte maskID; // $005: Mask ID Register
0x00, // Word swID; // $006: Software ID Register
- { 0 }, // Byte ___filler1[0x100-0x008];
+ 0, // Byte ___filler1[0x100-0x008];
0x0000, // Word csAGroupBase; // $100: Chip Select Group A Base Register
0x0000, // Word csBGroupBase; // $102: Chip Select Group B Base Register
@@ -136,18 +136,18 @@ const HwrM68328Type kInitial68328Registe
0x00000000, // DWord csDSelect3; // $14C: Group D Chip Select 3 Register
0x0000, // Word csDebug; // $150: Chip Select debug register
- { 0 }, // Byte ___filler2[0x200-0x152];
+ 0, // Byte ___filler2[0x200-0x152];
0x2400, // Word pllControl; // $200: PLL Control Register
0x0123, // Word pllFreqSel; // $202: PLL Frequency Select Register
0x0000, // Word pllTest; // $204: PLL Test Register
- { 0 }, // Byte __filler44;
+ 0, // Byte __filler44;
0x1F, // Byte pwrControl; // $207: Power Control Register
- { 0 }, // Byte ___filler3[0x300-0x208];
+ 0, // Byte ___filler3[0x300-0x208];
0x00, // Byte intVector; // $300: Interrupt Vector Register
- { 0 }, // Byte ___filler4;
+ 0, // Byte ___filler4;
0x0000, // Word intControl; // $302: Interrupt Control Register
0x00FF, // Word intMaskHi; // $304: Interrupt Mask Register/HIGH word
0xFFFF, // Word intMaskLo; // $306: Interrupt Mask Register/LOW word
@@ -158,36 +158,36 @@ const HwrM68328Type kInitial68328Registe
0x0000, // Word intPendingHi; // $310: Interrupt Pending Register
0x0000, // Word intPendingLo; // $312: Interrupt Pending Register
- { 0 }, // Byte ___filler4a[0x400-0x314];
+ 0, // Byte ___filler4a[0x400-0x314];
0x00, // Byte portADir; // $400: Port A Direction Register
0x00, // Byte portAData; // $401: Port A Data Register
- { 0 }, // Byte ___filler5;
+ 0, // Byte ___filler5;
0x00, // Byte portASelect; // $403: Port A Select Register
- { 0 }, // Byte ___filler6[4];
+ 0, // Byte ___filler6[4];
0x00, // Byte portBDir; // $408: Port B Direction Register
0x00, // Byte portBData; // $409: Port B Data Register
- { 0 }, // Byte ___filler7;
+ 0, // Byte ___filler7;
0x00, // Byte portBSelect; // $40B: Port B Select Register
- { 0 }, // Byte ___filler8[4];
+ 0, // Byte ___filler8[4];
0x00, // Byte portCDir; // $410: Port C Direction Register
0x00, // Byte portCData; // $411: Port C Data Register
- { 0 }, // Byte ___filler9;
+ 0, // Byte ___filler9;
0x00, // Byte portCSelect; // $413: Port C Select Register
- { 0 }, // Byte ___filler10[4];
+ 0, // Byte ___filler10[4];
0x00, // Byte portDDir; // $418: Port D Direction Register
0x00, // Byte portDData; // $419: Port D Data Register
0xFF, // Byte portDPullupEn; // $41A: Port D Pull-up Enable
- { 0 }, // Byte ___filler11;
+ 0, // Byte ___filler11;
0x00, // Byte portDPolarity; // $41C: Port D Polarity Register
0x00, // Byte portDIntReqEn; // $41D: Port D Interrupt Request Enable
- { 0 }, // Byte ___filler12;
+ 0, // Byte ___filler12;
0x00, // Byte portDIntEdge; // $41F: Port D IRQ Edge Register
0x00, // Byte portEDir; // $420: Port E Direction Register
@@ -195,51 +195,51 @@ const HwrM68328Type kInitial68328Registe
0x80, // Byte portEPullupEn; // $422: Port E Pull-up Enable
0x80, // Byte portESelect; // $423: Port E Select Register
- { 0 }, // Byte ___filler14[4];
+ 0, // Byte ___filler14[4];
0x00, // Byte portFDir; // $428: Port F Direction Register
0x00, // Byte portFData; // $429: Port F Data Register
0xFF, // Byte portFPullupEn; // $42A: Port F Pull-up Enable
0xFF, // Byte portFSelect; // $42B: Port F Select Register
- { 0 }, // Byte ___filler16[4];
+ 0, // Byte ___filler16[4];
0x00, // Byte portGDir; // $430: Port G Direction Register
0x00, // Byte portGData; // $431: Port G Data Register
0xFF, // Byte portGPullupEn; // $432: Port G Pull-up Enable
0xFF, // Byte portGSelect; // $433: Port G Select Register
- { 0 }, // Byte ___filler18[4];
+ 0, // Byte ___filler18[4];
0x00, // Byte portJDir; // $438: Port J Direction Register
0x00, // Byte portJData; // $439: Port J Data Register
- { 0 }, // Byte ___filler19;
+ 0, // Byte ___filler19;
0x00, // Byte portJSelect; // $43B: Port J Select Register
- { 0 }, // Byte ___filler19a[4];
+ 0, // Byte ___filler19a[4];
0x00, // Byte portKDir; // $440: Port K Direction Register
0x00, // Byte portKData; // $441: Port K Data Register
0x3F, // Byte portKPullupEn; // $442: Port K Pull-up Enable
0x3F, // Byte portKSelect; // $443: Port K Select Register
- { 0 }, // Byte ___filler21[4];
+ 0, // Byte ___filler21[4];
0x00, // Byte portMDir; // $448: Port M Direction Register
0x00, // Byte portMData; // $449: Port M Data Register
0xFF, // Byte portMPullupEn; // $44A: Port M Pull-up Enable Register
0x02, // Byte portMSelect; // $44B: Port M Select Register
- { 0 }, // Byte ___filler22[4];
+ 0, // Byte ___filler22[4];
- { 0 }, // Byte ___filler23[0x500-0x450];
+ 0, // Byte ___filler23[0x500-0x450];
0x0000, // Word pwmControl; // $500: PWM Control Register
0x0000, // Word pwmPeriod; // $502: PWM Period Register
0x0000, // Word pwmWidth; // $504: PWM Width Register
0x0000, // Word pwmCounter; // $506: PWM Counter
- { 0 }, // Byte ___filler24[0x600-0x508];
+ 0, // Byte ___filler24[0x600-0x508];
0x0000, // Word tmr1Control; // $600: Timer 1 Control Register
0x0000, // Word tmr1Prescaler; // $602: Timer 1 Prescaler Register
@@ -259,16 +259,16 @@ const HwrM68328Type kInitial68328Registe
0x0000, // Word wdReference; // $61A: Watchdog Reference Register
0x0000, // Word wdCounter; // $61C: Watchdog Counter
- { 0 }, // Byte ___filler25[0x700-0x61E];
+ 0, // Byte ___filler25[0x700-0x61E];
0x0000, // Word spiSlave; // $700: SPI Slave Register
- { 0 }, // Byte ___filler26[0x800-0x702];
+ 0, // Byte ___filler26[0x800-0x702];
0x0000, // Word spiMasterData; // $800: SPI Master Data Register
0x0000, // Word spiMasterControl; // $802: SPI Master Control Register
- { 0 }, // Byte ___filler27[0x900-0x804];
+ 0, // Byte ___filler27[0x900-0x804];
0x0000, // Word uControl; // $900: Uart Control Register
0x003F, // Word uBaud; // $902: Uart Baud Control Register
@@ -276,19 +276,19 @@ const HwrM68328Type kInitial68328Registe
0x0000, // Word uTransmit; // $906: Uart Transmit Register
0x0000, // Word uMisc; // $908: Uart Miscellaneous Register
- { 0 }, // Byte ___filler28[0xA00-0x90A];
+ 0, // Byte ___filler28[0xA00-0x90A];
0x00000000, // DWord lcdStartAddr; // $A00: Screen Starting Address Register
- { 0 }, // Byte ___filler29;
+ 0, // Byte ___filler29;
0xFF, // Byte lcdPageWidth; // $A05: Virtual Page Width Register
- { 0 }, // Byte ___filler30[2];
+ 0, // Byte ___filler30[2];
0x03FF, // Word lcdScreenWidth; // $A08: Screen Width Register
0x01FF, // Word lcdScreenHeight; // $A0A: Screen Height Register
- { 0 }, // Byte ___filler31[0xA18-0xA0C];
+ 0, // Byte ___filler31[0xA18-0xA0C];
0x0000, // Word lcdCursorXPos; // $A18: Cursor X Position
0x0000, // Word lcdCursorYPos; // $A1A: Cursor Y Position
0x0101, // Word lcdCursorWidthHeight; // $A1C: Cursor Width and Height
- { 0 }, // Byte ___filler32;
+ 0, // Byte ___filler32;
0x7F, // Byte lcdBlinkControl; // $A1F: Blink Control Register
0x00, // Byte lcdPanelControl; // $A20: Panel Interface Control Register
0x00, // Byte lcdPolarity; // $A21: Polarity Config Register
@@ -304,12 +304,12 @@ const HwrM68328Type kInitial68328Registe
0x3F, // Byte lcdOctetTermCount; // $A2B: Octet Terminal Count Register
0x00, // Byte ___filler38;
0x00, // Byte lcdPanningOffset; // $A2D: Panning Offset Register
- { 0 }, // Byte ___filler39[3];
+ 0, // Byte ___filler39[3];
0xB9, // Byte lcdFrameRate; // $A31: Frame Rate Control Modulation Register
0x1073, // Word lcdGrayPalette; // $A32: Gray Palette Mapping Register
0x00, // Byte lcdReserved; // $A34: Reserved
- { 0 }, // Byte ___filler40[0xB00-0xA35];
+ 0, // Byte ___filler40[0xB00-0xA35];
0x00000000, // DWord rtcHourMinSec; // $B00: RTC Hours, Minutes, Seconds Register
0x00000000, // DWord rtcAlarm; // $B04: RTC Alarm Register
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