33 lines
655 B
Makefile
33 lines
655 B
Makefile
# $OpenBSD: Makefile,v 1.2 2011/11/17 23:33:40 nigel Exp $
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COMMENT= very fast free Verilog HDL simulator
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DISTNAME= verilator-3.824
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CATEGORIES= lang devel
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HOMEPAGE= http://www.veripool.org/wiki/verilator/Intro
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# LGPLv3 or Perl
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PERMIT_PACKAGE_CDROM= Yes
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PERMIT_PACKAGE_FTP= Yes
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PERMIT_DISTFILES_CDROM= Yes
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PERMIT_DISTFILES_FTP= Yes
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MASTER_SITES= http://www.veripool.org/ftp/
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EXTRACT_SUFX= .tgz
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WANTLIB= c m stdc++
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BUILD_DEPENDS += devel/bison
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CONFIGURE_STYLE= gnu
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MAKE_FLAGS= VERILATOR_ROOT=${PREFIX}/share/verilator/ \
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COPT="${CFLAGS}"
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USE_GMAKE= Yes
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REGRESS_TARGET= test
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REGRESS_FLAGS= VERILATOR_ROOT=${WRKSRC}
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.include <bsd.port.mk>
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