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4 Commits

Author SHA1 Message Date
cwen
62dd7a112c spike: big endian and base-gcc architectures fixes 
- big endian archs: correct a type mismatch in a template function call, that
caused a build failure.
- base-gcc archs: Add a COMPILER line since it requires ports-gcc (C++11).
- powerpc: The simulation generates internal exceptions, mark it BROKEN.

OK kmos@ (who tested on sparc64, thanks!) and jasper@ (maintainer)
 2020-12-01 21:54:58 +00:00
jasper
b64e1145d7 compile disasm files with -O1 to half memory usage (to 4GB) when compiling these files 2020-11-05 08:35:16 +00:00
sthen
da693dd6f0 disable spike on i386, compiling disasm.cc uses more memory than there is 
available address space.
 2020-11-04 14:40:03 +00:00
jasper
1e0c75e9f7 import spike (git HEAD) 
Spike, the RISC-V ISA Simulator, implements a functional model of one or
more RISC-V harts.

ok aja@
 2020-11-01 15:01:37 +00:00