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- update verilator to 3.844

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- regen PLIST

ok jasper@
This commit is contained in:
benoit 2013-01-16 07:43:48 +00:00
parent 5106a1595e
commit fa4c018841
3 changed files with 7 additions and 8 deletions
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4
lang/verilator/Makefile
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@ -1,8 +1,8 @@
# $OpenBSD: Makefile,v 1.2 2011/11/17 23:33:40 nigel Exp $
# $OpenBSD: Makefile,v 1.3 2013/01/16 07:43:48 benoit Exp $
COMMENT= very fast free Verilog HDL simulator
DISTNAME= verilator-3.824
DISTNAME= verilator-3.844
CATEGORIES= lang devel
HOMEPAGE= http://www.veripool.org/wiki/verilator/Intro

7
lang/verilator/distinfo
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@ -1,5 +1,2 @@
MD5 (verilator-3.824.tgz) = bmVYZt51NgkW4XeJOfLasQ==
RMD160 (verilator-3.824.tgz) = Q7SUJgclp60PUjV4wKxM2JThZjk=
SHA1 (verilator-3.824.tgz) = CcU12gUgWlP9kQ9MjhneeIhfiGg=
SHA256 (verilator-3.824.tgz) = KHFLIIXuhc6ULtt7V3YDsocAvV75WadlV79tu+NLKlk=
SIZE (verilator-3.824.tgz) = 1577037
SHA256 (verilator-3.844.tgz) = WPXJ7LOPre0WfKlpQFR3DeTPcu5hfOCVawdkyWOyH0E=
SIZE (verilator-3.844.tgz) = 1846403

4
lang/verilator/pkg/PLIST
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@ -1,4 +1,4 @@
@comment $OpenBSD: PLIST,v 1.2 2011/11/14 11:00:23 jasper Exp $
@comment $OpenBSD: PLIST,v 1.3 2013/01/16 07:43:51 benoit Exp $
bin/verilator
@bin bin/verilator_bin
@bin bin/verilator_bin_dbg
@ -43,6 +43,8 @@ share/verilator/include/verilated_dpi.cpp
share/verilator/include/verilated_dpi.h
share/verilator/include/verilated_heavy.h
share/verilator/include/verilated_imp.h
share/verilator/include/verilated_save.cpp
share/verilator/include/verilated_save.h
share/verilator/include/verilated_sc.h
share/verilator/include/verilated_syms.h
share/verilator/include/verilated_vcd_c.cpp