libnettle: Fix adr use in arm64 assembly - I accidentally committed an old

version of these patches. Sorry about that.
This commit is contained in:
tb 2023-01-19 12:23:58 +00:00
parent 89981e64fb
commit cd7beb5c69
4 changed files with 34 additions and 4 deletions

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@ -2,7 +2,7 @@ COMMENT= cryptographic library
DISTNAME= nettle-3.8.1
PKGNAME= lib${DISTNAME}
REVISION= 0
REVISION= 1
SHARED_LIBS += hogweed 3.0 # 6.3
SHARED_LIBS += nettle 7.1 # 8.3

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@ -1,7 +1,17 @@
Index: arm64/chacha-2core.asm
--- arm64/chacha-2core.asm.orig
+++ arm64/chacha-2core.asm
@@ -227,5 +227,6 @@ PROLOGUE(_nettle_chacha_2core32)
@@ -79,7 +79,8 @@ PROLOGUE(_nettle_chacha_2core)
orr Y3.16b, Y3.16b, X1.16b
.Lshared_entry:
- adr x3, .Lrot24
+ adrp x3, .Lrot24
+ add x3, x3, :lo12:.Lrot24
ld1 {ROT24.4s},[x3]
add Y3.4s, Y3.4s, X3.4s
@@ -227,5 +228,6 @@ PROLOGUE(_nettle_chacha_2core32)
b .Lshared_entry
EPILOGUE(_nettle_chacha_2core32)

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@ -1,7 +1,17 @@
Index: arm64/chacha-4core.asm
--- arm64/chacha-4core.asm.orig
+++ arm64/chacha-4core.asm
@@ -230,6 +230,7 @@ PROLOGUE(_nettle_chacha_4core32)
@@ -146,7 +146,8 @@ PROLOGUE(_nettle_chacha_4core)
C Save callee-save registers
fmov x3, d8
- adr x4, .Lcnts
+ adrp x4, .Lcnts
+ add x4, x4, :lo12:.Lcnts
ld1 {TMP3.4s,ROT24.4s},[x4]
C Load state and splat
@@ -230,6 +231,7 @@ PROLOGUE(_nettle_chacha_4core32)
b .Lshared_entry
EPILOGUE(_nettle_chacha_4core32)

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@ -1,7 +1,17 @@
Index: arm64/chacha-core-internal.asm
--- arm64/chacha-core-internal.asm.orig
+++ arm64/chacha-core-internal.asm
@@ -122,5 +122,6 @@ PROLOGUE(_nettle_chacha_core)
@@ -82,7 +82,8 @@ define(`QROUND', `
.text
C _chacha_core(uint32_t *dst, const uint32_t *src, unsigned rounds)
PROLOGUE(_nettle_chacha_core)
- adr x3, .Lrot24
+ adrp x3, .Lrot24
+ add x3, x3, :lo12:.Lrot24
ld1 {ROT24.4s},[x3]
ld1 {X0.4s,X1.4s,X2.4s,X3.4s}, [SRC]
@@ -122,5 +123,6 @@ PROLOGUE(_nettle_chacha_core)
ret
EPILOGUE(_nettle_chacha_core)