Follow base and update to llvm-10.0.1
This commit is contained in:
parent
0d7abae687
commit
91a67452c3
@ -1,4 +1,4 @@
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# $OpenBSD: Makefile,v 1.258 2020/08/07 22:49:06 jca Exp $
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# $OpenBSD: Makefile,v 1.259 2020/08/10 11:38:43 jca Exp $
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# XXX If broken on an architecture, remove the arch from LLVM_ARCHS.
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ONLY_FOR_ARCHS = ${LLVM_ARCHS}
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@ -11,15 +11,13 @@ COMMENT-python = Python bindings for Clang
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# XXX: Remember to bump MODCLANG_VERSION in lang/clang/clang.port.mk when
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# updating this port.
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LLVM_V = 10.0.0
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LLVM_V = 10.0.1
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DISTNAME = llvm-${LLVM_V}.src
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PKGNAME = llvm-${LLVM_V}
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PKGSPEC-main = llvm-=${LLVM_V}
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PKGNAME-main = llvm-${LLVM_V}
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PKGNAME-python = py3-llvm-${LLVM_V}
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PKGNAME-lldb = lldb-${LLVM_V}
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REVISION-main = 1
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REVISION-lldb = 1
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CATEGORIES = devel
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@ -1,8 +1,8 @@
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SHA256 (clang-10.0.0.src.tar.xz) = iFsGKwDpA99yYxxfmLlXntHtJ5D3TlZGtCNPoITqyyE=
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SHA256 (lld-10.0.0.src.tar.xz) = uaDXxXbu7wW8BtbpVJOKAcU5bO4dHphYkeCxzxbj1wg=
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SHA256 (lldb-10.0.0.src.tar.xz) = 3R/8tC7QM/UWcInsTG6+hPvKHbSp6uv1xhSvCdiesTU=
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SHA256 (llvm-10.0.0.src.tar.xz) = 34OkSzqacQKQSewQH7AHfsu99f5B45UhUCV3kJmpj98=
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SIZE (clang-10.0.0.src.tar.xz) = 14190012
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SIZE (lld-10.0.0.src.tar.xz) = 1143340
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SIZE (lldb-10.0.0.src.tar.xz) = 9637552
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SIZE (llvm-10.0.0.src.tar.xz) = 35733192
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SHA256 (clang-10.0.1.src.tar.xz) = +Zr8OCuI5iLGibbZbK36YkHvVdypDof8FwNS4S3bKyQ=
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SHA256 (lld-10.0.1.src.tar.xz) = WRRJ4KpiOmMY1c4jcYYEAWU8SLtUCYLM3ZM5ksuI33o=
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SHA256 (lldb-10.0.1.src.tar.xz) = B6vofCWHaqMG5zEnMw9fN9JwtrCC1QzGeeMbT8AqNxQ=
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SHA256 (llvm-10.0.1.src.tar.xz) = xdjjC1fL3tcSjXjl6NrYEb/5eo1HGJaBL1f6me6CzfM=
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SIZE (clang-10.0.1.src.tar.xz) = 14046188
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SIZE (lld-10.0.1.src.tar.xz) = 1134580
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SIZE (lldb-10.0.1.src.tar.xz) = 9632124
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SIZE (llvm-10.0.1.src.tar.xz) = 35270168
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@ -1,4 +1,4 @@
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$OpenBSD: patch-lib_CodeGen_CMakeLists_txt,v 1.4 2020/08/05 06:49:48 jca Exp $
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$OpenBSD: patch-lib_CodeGen_CMakeLists_txt,v 1.5 2020/08/10 11:38:43 jca Exp $
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- Add RETGUARD to clang for amd64. This security mechanism uses per-function
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random cookies to protect access to function return instructions, with the
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@ -22,7 +22,7 @@ $OpenBSD: patch-lib_CodeGen_CMakeLists_txt,v 1.4 2020/08/05 06:49:48 jca Exp $
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Index: lib/CodeGen/CMakeLists.txt
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--- lib/CodeGen/CMakeLists.txt.orig
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+++ lib/CodeGen/CMakeLists.txt
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@@ -132,6 +132,8 @@ add_llvm_component_library(LLVMCodeGen
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@@ -135,6 +135,8 @@ add_llvm_component_library(LLVMCodeGen
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RegUsageInfoCollector.cpp
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RegUsageInfoPropagate.cpp
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ResetMachineFunctionPass.cpp
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@ -1,4 +1,4 @@
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$OpenBSD: patch-lib_CodeGen_SelectionDAG_DAGCombiner_cpp,v 1.4 2020/08/05 06:49:48 jca Exp $
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$OpenBSD: patch-lib_CodeGen_SelectionDAG_DAGCombiner_cpp,v 1.5 2020/08/10 11:38:43 jca Exp $
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When the DAG truncates an ISD::ADDE node, DAGCombiner may optimize it by making
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an adde with smaller operands. PowerPC has i1 registers, and may truncate an
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@ -9,7 +9,7 @@ select..." -- from base-clang
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Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp.orig
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+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@@ -10976,6 +10976,7 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
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@@ -10983,6 +10983,7 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
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// (trunc adde(X, Y, Carry)) -> (adde trunc(X), trunc(Y), Carry)
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// (trunc addcarry(X, Y, Carry)) -> (addcarry trunc(X), trunc(Y), Carry)
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// When the adde's carry is not used.
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@ -1,4 +1,4 @@
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$OpenBSD: patch-lib_Target_AArch64_AArch64FrameLowering_cpp,v 1.4 2020/08/05 06:49:48 jca Exp $
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$OpenBSD: patch-lib_Target_AArch64_AArch64FrameLowering_cpp,v 1.5 2020/08/10 11:38:43 jca Exp $
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Add retguard for arm64.
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@ -13,7 +13,7 @@ Index: lib/Target/AArch64/AArch64FrameLowering.cpp
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#include "AArch64StackOffset.h"
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#include "AArch64Subtarget.h"
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#include "AArch64TargetMachine.h"
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@@ -2359,6 +2360,10 @@ void AArch64FrameLowering::determineCalleeSaves(Machin
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@@ -2365,6 +2366,10 @@ void AArch64FrameLowering::determineCalleeSaves(Machin
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? RegInfo->getBaseRegister()
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: (unsigned)AArch64::NoRegister;
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@ -24,7 +24,7 @@ Index: lib/Target/AArch64/AArch64FrameLowering.cpp
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unsigned ExtraCSSpill = 0;
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// Figure out which callee-saved registers to save/restore.
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for (unsigned i = 0; CSRegs[i]; ++i) {
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@@ -2679,4 +2684,8 @@ unsigned AArch64FrameLowering::getWinEHFuncletFrameSiz
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@@ -2694,4 +2699,8 @@ unsigned AArch64FrameLowering::getWinEHFuncletFrameSiz
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// This is the amount of stack a funclet needs to allocate.
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return alignTo(CSSize + MF.getFrameInfo().getMaxCallFrameSize(),
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getStackAlignment());
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@ -1,4 +1,4 @@
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$OpenBSD: patch-lib_Target_AArch64_AArch64Subtarget_h,v 1.6 2020/08/05 06:49:48 jca Exp $
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$OpenBSD: patch-lib_Target_AArch64_AArch64Subtarget_h,v 1.7 2020/08/10 11:38:43 jca Exp $
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Disable the Load Stack Guard for OpenBSD on AArch64. We don't use it
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on any other platform and it causes a segfault in combination with our
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@ -7,7 +7,7 @@ IR Stack Guard.
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Index: lib/Target/AArch64/AArch64Subtarget.h
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--- lib/Target/AArch64/AArch64Subtarget.h.orig
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+++ lib/Target/AArch64/AArch64Subtarget.h
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@@ -407,6 +407,7 @@ class AArch64Subtarget final : public AArch64GenSubtar
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@@ -408,6 +408,7 @@ class AArch64Subtarget final : public AArch64GenSubtar
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bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
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bool isTargetIOS() const { return TargetTriple.isiOS(); }
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bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
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@ -1,4 +1,4 @@
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$OpenBSD: patch-lib_Target_PowerPC_PPCISelLowering_cpp,v 1.8 2020/08/05 06:49:48 jca Exp $
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$OpenBSD: patch-lib_Target_PowerPC_PPCISelLowering_cpp,v 1.9 2020/08/10 11:38:43 jca Exp $
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Set max atomic size for PowerPC, so AtomicExpandPass changes some
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8-byte atomic ops into libcalls.
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@ -13,7 +13,7 @@ compiler generate code that only uses aligned load and store instructions.
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Index: lib/Target/PowerPC/PPCISelLowering.cpp
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--- lib/Target/PowerPC/PPCISelLowering.cpp.orig
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+++ lib/Target/PowerPC/PPCISelLowering.cpp
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@@ -1124,7 +1124,10 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMa
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@@ -1142,7 +1142,10 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMa
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setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, isPPC64 ? Legal : Custom);
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@ -25,7 +25,7 @@ Index: lib/Target/PowerPC/PPCISelLowering.cpp
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setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand);
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setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Expand);
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}
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@@ -15266,6 +15269,14 @@ bool PPCTargetLowering::allowsMisalignedMemoryAccesses
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@@ -15295,6 +15298,14 @@ bool PPCTargetLowering::allowsMisalignedMemoryAccesses
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if (VT == MVT::ppcf128)
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return false;
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@ -1,4 +1,4 @@
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$OpenBSD: patch-lib_Target_X86_CMakeLists_txt,v 1.4 2019/07/06 15:06:36 jca Exp $
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$OpenBSD: patch-lib_Target_X86_CMakeLists_txt,v 1.5 2020/08/10 11:38:43 jca Exp $
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- Add a clang pass that identifies potential ROP gadgets and replaces ROP
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friendly instructions with safe alternatives. This initial commit fixes
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@ -18,10 +18,10 @@ Index: lib/Target/X86/CMakeLists.txt
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X86FixupLEAs.cpp
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X86AvoidStoreForwardingBlocks.cpp
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X86FixupSetCC.cpp
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@@ -59,6 +60,7 @@ set(sources
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@@ -61,6 +62,7 @@ set(sources
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X86PadShortFunction.cpp
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X86RegisterBankInfo.cpp
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X86RegisterInfo.cpp
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X86RetpolineThunks.cpp
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+ X86ReturnProtectorLowering.cpp
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X86SelectionDAGInfo.cpp
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X86ShuffleDecodeConstantPool.cpp
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@ -1,4 +1,4 @@
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$OpenBSD: patch-lib_Target_X86_X86Subtarget_h,v 1.7 2020/08/05 06:49:48 jca Exp $
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$OpenBSD: patch-lib_Target_X86_X86Subtarget_h,v 1.8 2020/08/10 11:38:43 jca Exp $
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- implement -msave-args in clang/llvm, like the sun did for gcc
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- Turn on -mretpoline by default in clang on amd64.
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@ -6,7 +6,7 @@ $OpenBSD: patch-lib_Target_X86_X86Subtarget_h,v 1.7 2020/08/05 06:49:48 jca Exp
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Index: lib/Target/X86/X86Subtarget.h
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--- lib/Target/X86/X86Subtarget.h.orig
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+++ lib/Target/X86/X86Subtarget.h
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@@ -431,6 +431,9 @@ class X86Subtarget final : public X86GenSubtargetInfo
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@@ -441,6 +441,9 @@ class X86Subtarget final : public X86GenSubtargetInfo
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/// entry to the function and which must be maintained by every function.
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Align stackAlignment = Align(4);
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@ -16,7 +16,7 @@ Index: lib/Target/X86/X86Subtarget.h
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/// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
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///
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// FIXME: this is a known good value for Yonah. How about others?
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@@ -521,6 +524,8 @@ class X86Subtarget final : public X86GenSubtargetInfo
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@@ -531,6 +534,8 @@ class X86Subtarget final : public X86GenSubtargetInfo
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return &getInstrInfo()->getRegisterInfo();
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}
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@ -25,7 +25,7 @@ Index: lib/Target/X86/X86Subtarget.h
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/// Returns the minimum alignment known to hold of the
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/// stack frame on entry to the function and which must be maintained by every
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/// function for this subtarget.
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@@ -753,6 +758,7 @@ class X86Subtarget final : public X86GenSubtargetInfo
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@@ -776,6 +781,7 @@ class X86Subtarget final : public X86GenSubtargetInfo
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bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
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bool isTargetFreeBSD() const { return TargetTriple.isOSFreeBSD(); }
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@ -1,4 +1,4 @@
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$OpenBSD: patch-lib_Target_X86_X86TargetMachine_cpp,v 1.5 2020/08/05 06:49:48 jca Exp $
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$OpenBSD: patch-lib_Target_X86_X86TargetMachine_cpp,v 1.6 2020/08/10 11:38:43 jca Exp $
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Add a clang pass that identifies potential ROP gadgets and replaces ROP
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friendly instructions with safe alternatives. This initial commit fixes
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@ -9,7 +9,7 @@ this framework.
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Index: lib/Target/X86/X86TargetMachine.cpp
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--- lib/Target/X86/X86TargetMachine.cpp.orig
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+++ lib/Target/X86/X86TargetMachine.cpp
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@@ -519,6 +519,7 @@ void X86PassConfig::addPreEmitPass() {
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@@ -525,6 +525,7 @@ void X86PassConfig::addPreEmitPass() {
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}
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addPass(createX86DiscriminateMemOpsPass());
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addPass(createX86InsertPrefetchPass());
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@ -1,4 +1,4 @@
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$OpenBSD: patch-tools_clang_include_clang_Driver_Options_td,v 1.21 2020/08/05 06:49:48 jca Exp $
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$OpenBSD: patch-tools_clang_include_clang_Driver_Options_td,v 1.22 2020/08/10 11:38:43 jca Exp $
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- Add ret protector options as no-ops.
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- Improve the X86FixupGadgets pass
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@ -24,7 +24,7 @@ Index: tools/clang/include/clang/Driver/Options.td
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def fstandalone_debug : Flag<["-"], "fstandalone-debug">, Group<f_Group>, Flags<[CoreOption]>,
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HelpText<"Emit full debug info for all types used by the program">;
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def fno_standalone_debug : Flag<["-"], "fno-standalone-debug">, Group<f_Group>, Flags<[CoreOption]>,
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@@ -2439,6 +2447,12 @@ def mlongcall: Flag<["-"], "mlongcall">,
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@@ -2447,6 +2455,12 @@ def mlongcall: Flag<["-"], "mlongcall">,
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Group<m_ppc_Features_Group>;
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def mno_longcall : Flag<["-"], "mno-longcall">,
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Group<m_ppc_Features_Group>;
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@ -37,7 +37,7 @@ Index: tools/clang/include/clang/Driver/Options.td
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def mvx : Flag<["-"], "mvx">, Group<m_Group>;
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def mno_vx : Flag<["-"], "mno-vx">, Group<m_Group>;
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@@ -2719,7 +2733,7 @@ def pthreads : Flag<["-"], "pthreads">;
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@@ -2727,7 +2741,7 @@ def pthreads : Flag<["-"], "pthreads">;
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def pthread : Flag<["-"], "pthread">, Flags<[CC1Option]>,
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HelpText<"Support POSIX threads in generated code">;
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def no_pthread : Flag<["-"], "no-pthread">, Flags<[CC1Option]>;
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@ -46,7 +46,7 @@ Index: tools/clang/include/clang/Driver/Options.td
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def pie : Flag<["-"], "pie">;
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def static_pie : Flag<["-"], "static-pie">;
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def read__only__relocs : Separate<["-"], "read_only_relocs">;
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@@ -3192,6 +3206,8 @@ def mshstk : Flag<["-"], "mshstk">, Group<m_x86_Featur
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@@ -3200,6 +3214,8 @@ def mshstk : Flag<["-"], "mshstk">, Group<m_x86_Featur
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def mno_shstk : Flag<["-"], "mno-shstk">, Group<m_x86_Features_Group>;
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def mretpoline_external_thunk : Flag<["-"], "mretpoline-external-thunk">, Group<m_x86_Features_Group>;
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def mno_retpoline_external_thunk : Flag<["-"], "mno-retpoline-external-thunk">, Group<m_x86_Features_Group>;
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@ -1,11 +1,11 @@
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$OpenBSD: patch-tools_clang_lib_Basic_Targets_PPC_h,v 1.3 2020/08/05 06:49:49 jca Exp $
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$OpenBSD: patch-tools_clang_lib_Basic_Targets_PPC_h,v 1.4 2020/08/10 11:38:43 jca Exp $
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Add our OpenBSD specific defines on PowerPC64 targets.
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Index: tools/clang/lib/Basic/Targets/PPC.h
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--- tools/clang/lib/Basic/Targets/PPC.h.orig
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+++ tools/clang/lib/Basic/Targets/PPC.h
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@@ -396,7 +396,7 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public
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@@ -397,7 +397,7 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public
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SuitableAlign = 64;
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if (Triple.isOSFreeBSD() || Triple.getOS() == llvm::Triple::AIX ||
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@ -1,49 +0,0 @@
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$OpenBSD: patch-tools_clang_lib_CodeGen_CGVTables_cpp,v 1.1 2020/08/07 11:42:02 jca Exp $
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backport llvm 10.0.1 fix for net/libtorrent-rasterbar. see:
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https://bugs.llvm.org/show_bug.cgi?id=43814
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commit 68cd4f72beae67a9bdbc11c85fd745dec8fc0999
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from: Reid Kleckner <rnk@google.com>
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date: Mon Apr 13 17:34:45 2020 UTC
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via: tstellar <tstellar@redhat.com>
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Use FinishThunk to finish musttail thunks
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FinishThunk, and the invariant of setting and then unsetting
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CurCodeDecl, was added in 7f416cc42638 (2015). The invariant didn't
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exist when I added this musttail codepath in ab2090d10765 (2014).
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Recently in 28328c3771, I started using this codepath on non-Windows
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platforms, and users reported problems during release testing (PR44987).
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The issue was already present for users of EH on i686-windows-msvc, so I
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added a test for that case as well.
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Reviewed By: hans
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Differential Revision: https://reviews.llvm.org/D76444
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(cherry picked from commit ce5173c0e174870934d1b3a026f631d996136191)
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Index: tools/clang/lib/CodeGen/CGVTables.cpp
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--- tools/clang/lib/CodeGen/CGVTables.cpp.orig
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+++ tools/clang/lib/CodeGen/CGVTables.cpp
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@@ -437,7 +437,8 @@ void CodeGenFunction::EmitMustTailThunk(GlobalDecl GD,
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// Finish the function to maintain CodeGenFunction invariants.
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// FIXME: Don't emit unreachable code.
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EmitBlock(createBasicBlock());
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- FinishFunction();
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+
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+ FinishThunk();
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}
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void CodeGenFunction::generateThunk(llvm::Function *Fn,
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@@ -564,7 +565,7 @@ llvm::Constant *CodeGenVTables::maybeEmitThunk(GlobalD
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CGM.SetLLVMFunctionAttributesForDefinition(GD.getDecl(), ThunkFn);
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// Thunks for variadic methods are special because in general variadic
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- // arguments cannot be perferctly forwarded. In the general case, clang
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+ // arguments cannot be perfectly forwarded. In the general case, clang
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// implements such thunks by cloning the original function body. However, for
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// thunks with no return adjustment on targets that support musttail, we can
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// use musttail to perfectly forward the variadic arguments.
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@ -1,4 +1,4 @@
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$OpenBSD: patch-tools_clang_lib_CodeGen_TargetInfo_cpp,v 1.4 2020/08/05 06:49:49 jca Exp $
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$OpenBSD: patch-tools_clang_lib_CodeGen_TargetInfo_cpp,v 1.5 2020/08/10 11:38:43 jca Exp $
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Add -msvr4-struct-return for powerpc.
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@ -110,7 +110,7 @@ Index: tools/clang/lib/CodeGen/TargetInfo.cpp
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bool
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||||
PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
|
||||
llvm::Value *Address) const {
|
||||
@@ -9852,10 +9916,14 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeG
|
||||
@@ -9853,10 +9917,14 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeG
|
||||
return SetCGInfo(new ARMTargetCodeGenInfo(Types, Kind));
|
||||
}
|
||||
|
||||
|
@ -1,4 +1,4 @@
|
||||
$OpenBSD: patch-tools_clang_lib_Driver_ToolChains_Arch_X86_cpp,v 1.2 2020/08/07 11:42:02 jca Exp $
|
||||
$OpenBSD: patch-tools_clang_lib_Driver_ToolChains_Arch_X86_cpp,v 1.3 2020/08/10 11:38:43 jca Exp $
|
||||
|
||||
- change the default i386 target to i586 processors
|
||||
- Turn on -mretpoline by default in clang on amd64.
|
||||
@ -17,14 +17,15 @@ Index: tools/clang/lib/Driver/ToolChains/Arch/X86.cpp
|
||||
return "i586";
|
||||
default:
|
||||
// Fallback to p4.
|
||||
@@ -146,6 +146,11 @@ void x86::getX86TargetFeatures(const Driver &D, const
|
||||
// flags). This is a bit hacky but keeps existing usages working. We should
|
||||
@@ -147,6 +147,12 @@ void x86::getX86TargetFeatures(const Driver &D, const
|
||||
// consider deprecating this and instead warn if the user requests external
|
||||
// retpoline thunks and *doesn't* request some form of retpolines.
|
||||
auto SpectreOpt = clang::driver::options::ID::OPT_INVALID;
|
||||
+ if (Triple.isOSOpenBSD() && Triple.getArch() == llvm::Triple::x86_64 &&
|
||||
+ Args.hasFlag(options::OPT_mretpoline, options::OPT_mno_retpoline, true)) {
|
||||
+ Features.push_back("+retpoline-indirect-calls");
|
||||
+ Features.push_back("+retpoline-indirect-branches");
|
||||
+ SpectreOpt = options::OPT_mretpoline;
|
||||
+ } else
|
||||
if (Args.hasArgNoClaim(options::OPT_mretpoline, options::OPT_mno_retpoline,
|
||||
options::OPT_mspeculative_load_hardening,
|
||||
|
@ -1,11 +1,11 @@
|
||||
$OpenBSD: patch-tools_clang_lib_Driver_ToolChains_Gnu_cpp,v 1.8 2020/08/05 06:49:49 jca Exp $
|
||||
$OpenBSD: patch-tools_clang_lib_Driver_ToolChains_Gnu_cpp,v 1.9 2020/08/10 11:38:43 jca Exp $
|
||||
|
||||
- Disable IAS for OpenBSD SPARC.
|
||||
|
||||
Index: tools/clang/lib/Driver/ToolChains/Gnu.cpp
|
||||
--- tools/clang/lib/Driver/ToolChains/Gnu.cpp.orig
|
||||
+++ tools/clang/lib/Driver/ToolChains/Gnu.cpp
|
||||
@@ -2657,7 +2657,7 @@ bool Generic_GCC::IsIntegratedAssemblerDefault() const
|
||||
@@ -2659,7 +2659,7 @@ bool Generic_GCC::IsIntegratedAssemblerDefault() const
|
||||
case llvm::Triple::sparc:
|
||||
case llvm::Triple::sparcel:
|
||||
case llvm::Triple::sparcv9:
|
||||
|
@ -1,4 +1,4 @@
|
||||
$OpenBSD: patch-tools_lld_ELF_Driver_cpp,v 1.14 2020/08/05 06:49:49 jca Exp $
|
||||
$OpenBSD: patch-tools_lld_ELF_Driver_cpp,v 1.15 2020/08/10 11:38:43 jca Exp $
|
||||
|
||||
- Enable PIE by default.
|
||||
- XXX retpoline, EM_SPARCV9, ???
|
||||
@ -95,7 +95,7 @@ Index: tools/lld/ELF/Driver.cpp
|
||||
// Parses -image-base option.
|
||||
static Optional<uint64_t> getImageBase(opt::InputArgList &args) {
|
||||
// Because we are using "Config->maxPageSize" here, this function has to be
|
||||
@@ -1935,6 +1957,11 @@ template <class ELFT> void LinkerDriver::link(opt::Inp
|
||||
@@ -1944,6 +1966,11 @@ template <class ELFT> void LinkerDriver::link(opt::Inp
|
||||
// optimizations such as DATA_SEGMENT_ALIGN in linker scripts. LLD's use of it
|
||||
// is limited to writing trap instructions on the last executable segment.
|
||||
config->commonPageSize = getCommonPageSize(args);
|
||||
|
@ -1,4 +1,4 @@
|
||||
$OpenBSD: patch-tools_lld_ELF_Writer_cpp,v 1.13 2020/08/05 06:49:49 jca Exp $
|
||||
$OpenBSD: patch-tools_lld_ELF_Writer_cpp,v 1.14 2020/08/10 11:38:43 jca Exp $
|
||||
|
||||
- Merge '.openbsd.randomdata.*' sections into a single '.openbsd.randomdata'
|
||||
section when linking, as we do when using ld from binutils.
|
||||
@ -50,7 +50,7 @@ Index: tools/lld/ELF/Writer.cpp
|
||||
// Setup MIPS _gp_disp/__gnu_local_gp symbols which should
|
||||
// be equal to the _gp symbol's value.
|
||||
if (ElfSym::mipsGp) {
|
||||
@@ -2252,6 +2261,31 @@ template <class ELFT> void Writer<ELFT>::fixSectionAli
|
||||
@@ -2265,6 +2274,31 @@ template <class ELFT> void Writer<ELFT>::fixSectionAli
|
||||
};
|
||||
}
|
||||
};
|
||||
|
@ -1,6 +1,6 @@
|
||||
@comment $OpenBSD: PLIST-main,v 1.19 2020/08/07 11:42:02 jca Exp $
|
||||
@pkgpath devel/llvm
|
||||
@comment $OpenBSD: PLIST-main,v 1.20 2020/08/10 11:38:43 jca Exp $
|
||||
@conflict lldb-<10.0.0p0
|
||||
@pkgpath devel/llvm
|
||||
@bin bin/bugpoint
|
||||
@bin bin/c-index-test
|
||||
bin/clang
|
||||
@ -1192,6 +1192,9 @@ include/llvm/CodeGen/ParallelCG.h
|
||||
include/llvm/CodeGen/Passes.h
|
||||
include/llvm/CodeGen/PreISelIntrinsicLowering.h
|
||||
include/llvm/CodeGen/PseudoSourceValue.h
|
||||
include/llvm/CodeGen/RDFGraph.h
|
||||
include/llvm/CodeGen/RDFLiveness.h
|
||||
include/llvm/CodeGen/RDFRegisters.h
|
||||
include/llvm/CodeGen/ReachingDefAnalysis.h
|
||||
include/llvm/CodeGen/RegAllocPBQP.h
|
||||
include/llvm/CodeGen/RegAllocRegistry.h
|
||||
@ -2501,6 +2504,7 @@ lib/cmake/llvm/HandleLLVMOptions.cmake
|
||||
lib/cmake/llvm/HandleLLVMStdlib.cmake
|
||||
lib/cmake/llvm/LLVM-Config.cmake
|
||||
lib/cmake/llvm/LLVMConfig.cmake
|
||||
lib/cmake/llvm/LLVMConfigExtensions.cmake
|
||||
lib/cmake/llvm/LLVMConfigVersion.cmake
|
||||
lib/cmake/llvm/LLVMDistributionSupport.cmake
|
||||
lib/cmake/llvm/LLVMExports${MODCMAKE_BUILD_SUFFIX}
|
||||
@ -2559,6 +2563,7 @@ lib/cmake/llvm/VersionFromVCS.cmake
|
||||
@static-lib lib/libLLVMDemangle.a
|
||||
@static-lib lib/libLLVMDlltoolDriver.a
|
||||
@static-lib lib/libLLVMExecutionEngine.a
|
||||
@static-lib lib/libLLVMExtensions.a
|
||||
@static-lib lib/libLLVMFrontendOpenMP.a
|
||||
@static-lib lib/libLLVMFuzzMutate.a
|
||||
@static-lib lib/libLLVMGlobalISel.a
|
||||
|
Loading…
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Reference in New Issue
Block a user