Follow base and update to llvm-10.0.1

This commit is contained in:
jca 2020-08-10 11:38:43 +00:00
parent 0d7abae687
commit 91a67452c3
19 changed files with 56 additions and 101 deletions

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@ -1,4 +1,4 @@
# $OpenBSD: Makefile,v 1.258 2020/08/07 22:49:06 jca Exp $
# $OpenBSD: Makefile,v 1.259 2020/08/10 11:38:43 jca Exp $
# XXX If broken on an architecture, remove the arch from LLVM_ARCHS.
ONLY_FOR_ARCHS = ${LLVM_ARCHS}
@ -11,15 +11,13 @@ COMMENT-python = Python bindings for Clang
# XXX: Remember to bump MODCLANG_VERSION in lang/clang/clang.port.mk when
# updating this port.
LLVM_V = 10.0.0
LLVM_V = 10.0.1
DISTNAME = llvm-${LLVM_V}.src
PKGNAME = llvm-${LLVM_V}
PKGSPEC-main = llvm-=${LLVM_V}
PKGNAME-main = llvm-${LLVM_V}
PKGNAME-python = py3-llvm-${LLVM_V}
PKGNAME-lldb = lldb-${LLVM_V}
REVISION-main = 1
REVISION-lldb = 1
CATEGORIES = devel

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@ -1,8 +1,8 @@
SHA256 (clang-10.0.0.src.tar.xz) = iFsGKwDpA99yYxxfmLlXntHtJ5D3TlZGtCNPoITqyyE=
SHA256 (lld-10.0.0.src.tar.xz) = uaDXxXbu7wW8BtbpVJOKAcU5bO4dHphYkeCxzxbj1wg=
SHA256 (lldb-10.0.0.src.tar.xz) = 3R/8tC7QM/UWcInsTG6+hPvKHbSp6uv1xhSvCdiesTU=
SHA256 (llvm-10.0.0.src.tar.xz) = 34OkSzqacQKQSewQH7AHfsu99f5B45UhUCV3kJmpj98=
SIZE (clang-10.0.0.src.tar.xz) = 14190012
SIZE (lld-10.0.0.src.tar.xz) = 1143340
SIZE (lldb-10.0.0.src.tar.xz) = 9637552
SIZE (llvm-10.0.0.src.tar.xz) = 35733192
SHA256 (clang-10.0.1.src.tar.xz) = +Zr8OCuI5iLGibbZbK36YkHvVdypDof8FwNS4S3bKyQ=
SHA256 (lld-10.0.1.src.tar.xz) = WRRJ4KpiOmMY1c4jcYYEAWU8SLtUCYLM3ZM5ksuI33o=
SHA256 (lldb-10.0.1.src.tar.xz) = B6vofCWHaqMG5zEnMw9fN9JwtrCC1QzGeeMbT8AqNxQ=
SHA256 (llvm-10.0.1.src.tar.xz) = xdjjC1fL3tcSjXjl6NrYEb/5eo1HGJaBL1f6me6CzfM=
SIZE (clang-10.0.1.src.tar.xz) = 14046188
SIZE (lld-10.0.1.src.tar.xz) = 1134580
SIZE (lldb-10.0.1.src.tar.xz) = 9632124
SIZE (llvm-10.0.1.src.tar.xz) = 35270168

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@ -1,4 +1,4 @@
$OpenBSD: patch-lib_CodeGen_CMakeLists_txt,v 1.4 2020/08/05 06:49:48 jca Exp $
$OpenBSD: patch-lib_CodeGen_CMakeLists_txt,v 1.5 2020/08/10 11:38:43 jca Exp $
- Add RETGUARD to clang for amd64. This security mechanism uses per-function
random cookies to protect access to function return instructions, with the
@ -22,7 +22,7 @@ $OpenBSD: patch-lib_CodeGen_CMakeLists_txt,v 1.4 2020/08/05 06:49:48 jca Exp $
Index: lib/CodeGen/CMakeLists.txt
--- lib/CodeGen/CMakeLists.txt.orig
+++ lib/CodeGen/CMakeLists.txt
@@ -132,6 +132,8 @@ add_llvm_component_library(LLVMCodeGen
@@ -135,6 +135,8 @@ add_llvm_component_library(LLVMCodeGen
RegUsageInfoCollector.cpp
RegUsageInfoPropagate.cpp
ResetMachineFunctionPass.cpp

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@ -1,4 +1,4 @@
$OpenBSD: patch-lib_CodeGen_SelectionDAG_DAGCombiner_cpp,v 1.4 2020/08/05 06:49:48 jca Exp $
$OpenBSD: patch-lib_CodeGen_SelectionDAG_DAGCombiner_cpp,v 1.5 2020/08/10 11:38:43 jca Exp $
When the DAG truncates an ISD::ADDE node, DAGCombiner may optimize it by making
an adde with smaller operands. PowerPC has i1 registers, and may truncate an
@ -9,7 +9,7 @@ select..." -- from base-clang
Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp.orig
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -10976,6 +10976,7 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
@@ -10983,6 +10983,7 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
// (trunc adde(X, Y, Carry)) -> (adde trunc(X), trunc(Y), Carry)
// (trunc addcarry(X, Y, Carry)) -> (addcarry trunc(X), trunc(Y), Carry)
// When the adde's carry is not used.

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@ -1,4 +1,4 @@
$OpenBSD: patch-lib_Target_AArch64_AArch64FrameLowering_cpp,v 1.4 2020/08/05 06:49:48 jca Exp $
$OpenBSD: patch-lib_Target_AArch64_AArch64FrameLowering_cpp,v 1.5 2020/08/10 11:38:43 jca Exp $
Add retguard for arm64.
@ -13,7 +13,7 @@ Index: lib/Target/AArch64/AArch64FrameLowering.cpp
#include "AArch64StackOffset.h"
#include "AArch64Subtarget.h"
#include "AArch64TargetMachine.h"
@@ -2359,6 +2360,10 @@ void AArch64FrameLowering::determineCalleeSaves(Machin
@@ -2365,6 +2366,10 @@ void AArch64FrameLowering::determineCalleeSaves(Machin
? RegInfo->getBaseRegister()
: (unsigned)AArch64::NoRegister;
@ -24,7 +24,7 @@ Index: lib/Target/AArch64/AArch64FrameLowering.cpp
unsigned ExtraCSSpill = 0;
// Figure out which callee-saved registers to save/restore.
for (unsigned i = 0; CSRegs[i]; ++i) {
@@ -2679,4 +2684,8 @@ unsigned AArch64FrameLowering::getWinEHFuncletFrameSiz
@@ -2694,4 +2699,8 @@ unsigned AArch64FrameLowering::getWinEHFuncletFrameSiz
// This is the amount of stack a funclet needs to allocate.
return alignTo(CSSize + MF.getFrameInfo().getMaxCallFrameSize(),
getStackAlignment());

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@ -1,4 +1,4 @@
$OpenBSD: patch-lib_Target_AArch64_AArch64Subtarget_h,v 1.6 2020/08/05 06:49:48 jca Exp $
$OpenBSD: patch-lib_Target_AArch64_AArch64Subtarget_h,v 1.7 2020/08/10 11:38:43 jca Exp $
Disable the Load Stack Guard for OpenBSD on AArch64. We don't use it
on any other platform and it causes a segfault in combination with our
@ -7,7 +7,7 @@ IR Stack Guard.
Index: lib/Target/AArch64/AArch64Subtarget.h
--- lib/Target/AArch64/AArch64Subtarget.h.orig
+++ lib/Target/AArch64/AArch64Subtarget.h
@@ -407,6 +407,7 @@ class AArch64Subtarget final : public AArch64GenSubtar
@@ -408,6 +408,7 @@ class AArch64Subtarget final : public AArch64GenSubtar
bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
bool isTargetIOS() const { return TargetTriple.isiOS(); }
bool isTargetLinux() const { return TargetTriple.isOSLinux(); }

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@ -1,4 +1,4 @@
$OpenBSD: patch-lib_Target_PowerPC_PPCISelLowering_cpp,v 1.8 2020/08/05 06:49:48 jca Exp $
$OpenBSD: patch-lib_Target_PowerPC_PPCISelLowering_cpp,v 1.9 2020/08/10 11:38:43 jca Exp $
Set max atomic size for PowerPC, so AtomicExpandPass changes some
8-byte atomic ops into libcalls.
@ -13,7 +13,7 @@ compiler generate code that only uses aligned load and store instructions.
Index: lib/Target/PowerPC/PPCISelLowering.cpp
--- lib/Target/PowerPC/PPCISelLowering.cpp.orig
+++ lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1124,7 +1124,10 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMa
@@ -1142,7 +1142,10 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMa
setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, isPPC64 ? Legal : Custom);
@ -25,7 +25,7 @@ Index: lib/Target/PowerPC/PPCISelLowering.cpp
setOperationAction(ISD::ATOMIC_LOAD, MVT::i64, Expand);
setOperationAction(ISD::ATOMIC_STORE, MVT::i64, Expand);
}
@@ -15266,6 +15269,14 @@ bool PPCTargetLowering::allowsMisalignedMemoryAccesses
@@ -15295,6 +15298,14 @@ bool PPCTargetLowering::allowsMisalignedMemoryAccesses
if (VT == MVT::ppcf128)
return false;

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@ -1,4 +1,4 @@
$OpenBSD: patch-lib_Target_X86_CMakeLists_txt,v 1.4 2019/07/06 15:06:36 jca Exp $
$OpenBSD: patch-lib_Target_X86_CMakeLists_txt,v 1.5 2020/08/10 11:38:43 jca Exp $
- Add a clang pass that identifies potential ROP gadgets and replaces ROP
friendly instructions with safe alternatives. This initial commit fixes
@ -18,10 +18,10 @@ Index: lib/Target/X86/CMakeLists.txt
X86FixupLEAs.cpp
X86AvoidStoreForwardingBlocks.cpp
X86FixupSetCC.cpp
@@ -59,6 +60,7 @@ set(sources
@@ -61,6 +62,7 @@ set(sources
X86PadShortFunction.cpp
X86RegisterBankInfo.cpp
X86RegisterInfo.cpp
X86RetpolineThunks.cpp
+ X86ReturnProtectorLowering.cpp
X86SelectionDAGInfo.cpp
X86ShuffleDecodeConstantPool.cpp

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@ -1,4 +1,4 @@
$OpenBSD: patch-lib_Target_X86_X86Subtarget_h,v 1.7 2020/08/05 06:49:48 jca Exp $
$OpenBSD: patch-lib_Target_X86_X86Subtarget_h,v 1.8 2020/08/10 11:38:43 jca Exp $
- implement -msave-args in clang/llvm, like the sun did for gcc
- Turn on -mretpoline by default in clang on amd64.
@ -6,7 +6,7 @@ $OpenBSD: patch-lib_Target_X86_X86Subtarget_h,v 1.7 2020/08/05 06:49:48 jca Exp
Index: lib/Target/X86/X86Subtarget.h
--- lib/Target/X86/X86Subtarget.h.orig
+++ lib/Target/X86/X86Subtarget.h
@@ -431,6 +431,9 @@ class X86Subtarget final : public X86GenSubtargetInfo
@@ -441,6 +441,9 @@ class X86Subtarget final : public X86GenSubtargetInfo
/// entry to the function and which must be maintained by every function.
Align stackAlignment = Align(4);
@ -16,7 +16,7 @@ Index: lib/Target/X86/X86Subtarget.h
/// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
///
// FIXME: this is a known good value for Yonah. How about others?
@@ -521,6 +524,8 @@ class X86Subtarget final : public X86GenSubtargetInfo
@@ -531,6 +534,8 @@ class X86Subtarget final : public X86GenSubtargetInfo
return &getInstrInfo()->getRegisterInfo();
}
@ -25,7 +25,7 @@ Index: lib/Target/X86/X86Subtarget.h
/// Returns the minimum alignment known to hold of the
/// stack frame on entry to the function and which must be maintained by every
/// function for this subtarget.
@@ -753,6 +758,7 @@ class X86Subtarget final : public X86GenSubtargetInfo
@@ -776,6 +781,7 @@ class X86Subtarget final : public X86GenSubtargetInfo
bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
bool isTargetFreeBSD() const { return TargetTriple.isOSFreeBSD(); }

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@ -1,4 +1,4 @@
$OpenBSD: patch-lib_Target_X86_X86TargetMachine_cpp,v 1.5 2020/08/05 06:49:48 jca Exp $
$OpenBSD: patch-lib_Target_X86_X86TargetMachine_cpp,v 1.6 2020/08/10 11:38:43 jca Exp $
Add a clang pass that identifies potential ROP gadgets and replaces ROP
friendly instructions with safe alternatives. This initial commit fixes
@ -9,7 +9,7 @@ this framework.
Index: lib/Target/X86/X86TargetMachine.cpp
--- lib/Target/X86/X86TargetMachine.cpp.orig
+++ lib/Target/X86/X86TargetMachine.cpp
@@ -519,6 +519,7 @@ void X86PassConfig::addPreEmitPass() {
@@ -525,6 +525,7 @@ void X86PassConfig::addPreEmitPass() {
}
addPass(createX86DiscriminateMemOpsPass());
addPass(createX86InsertPrefetchPass());

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@ -1,4 +1,4 @@
$OpenBSD: patch-tools_clang_include_clang_Driver_Options_td,v 1.21 2020/08/05 06:49:48 jca Exp $
$OpenBSD: patch-tools_clang_include_clang_Driver_Options_td,v 1.22 2020/08/10 11:38:43 jca Exp $
- Add ret protector options as no-ops.
- Improve the X86FixupGadgets pass
@ -24,7 +24,7 @@ Index: tools/clang/include/clang/Driver/Options.td
def fstandalone_debug : Flag<["-"], "fstandalone-debug">, Group<f_Group>, Flags<[CoreOption]>,
HelpText<"Emit full debug info for all types used by the program">;
def fno_standalone_debug : Flag<["-"], "fno-standalone-debug">, Group<f_Group>, Flags<[CoreOption]>,
@@ -2439,6 +2447,12 @@ def mlongcall: Flag<["-"], "mlongcall">,
@@ -2447,6 +2455,12 @@ def mlongcall: Flag<["-"], "mlongcall">,
Group<m_ppc_Features_Group>;
def mno_longcall : Flag<["-"], "mno-longcall">,
Group<m_ppc_Features_Group>;
@ -37,7 +37,7 @@ Index: tools/clang/include/clang/Driver/Options.td
def mvx : Flag<["-"], "mvx">, Group<m_Group>;
def mno_vx : Flag<["-"], "mno-vx">, Group<m_Group>;
@@ -2719,7 +2733,7 @@ def pthreads : Flag<["-"], "pthreads">;
@@ -2727,7 +2741,7 @@ def pthreads : Flag<["-"], "pthreads">;
def pthread : Flag<["-"], "pthread">, Flags<[CC1Option]>,
HelpText<"Support POSIX threads in generated code">;
def no_pthread : Flag<["-"], "no-pthread">, Flags<[CC1Option]>;
@ -46,7 +46,7 @@ Index: tools/clang/include/clang/Driver/Options.td
def pie : Flag<["-"], "pie">;
def static_pie : Flag<["-"], "static-pie">;
def read__only__relocs : Separate<["-"], "read_only_relocs">;
@@ -3192,6 +3206,8 @@ def mshstk : Flag<["-"], "mshstk">, Group<m_x86_Featur
@@ -3200,6 +3214,8 @@ def mshstk : Flag<["-"], "mshstk">, Group<m_x86_Featur
def mno_shstk : Flag<["-"], "mno-shstk">, Group<m_x86_Features_Group>;
def mretpoline_external_thunk : Flag<["-"], "mretpoline-external-thunk">, Group<m_x86_Features_Group>;
def mno_retpoline_external_thunk : Flag<["-"], "mno-retpoline-external-thunk">, Group<m_x86_Features_Group>;

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@ -1,11 +1,11 @@
$OpenBSD: patch-tools_clang_lib_Basic_Targets_PPC_h,v 1.3 2020/08/05 06:49:49 jca Exp $
$OpenBSD: patch-tools_clang_lib_Basic_Targets_PPC_h,v 1.4 2020/08/10 11:38:43 jca Exp $
Add our OpenBSD specific defines on PowerPC64 targets.
Index: tools/clang/lib/Basic/Targets/PPC.h
--- tools/clang/lib/Basic/Targets/PPC.h.orig
+++ tools/clang/lib/Basic/Targets/PPC.h
@@ -396,7 +396,7 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public
@@ -397,7 +397,7 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public
SuitableAlign = 64;
if (Triple.isOSFreeBSD() || Triple.getOS() == llvm::Triple::AIX ||

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@ -1,49 +0,0 @@
$OpenBSD: patch-tools_clang_lib_CodeGen_CGVTables_cpp,v 1.1 2020/08/07 11:42:02 jca Exp $
backport llvm 10.0.1 fix for net/libtorrent-rasterbar. see:
https://bugs.llvm.org/show_bug.cgi?id=43814
commit 68cd4f72beae67a9bdbc11c85fd745dec8fc0999
from: Reid Kleckner <rnk@google.com>
date: Mon Apr 13 17:34:45 2020 UTC
via: tstellar <tstellar@redhat.com>
Use FinishThunk to finish musttail thunks
FinishThunk, and the invariant of setting and then unsetting
CurCodeDecl, was added in 7f416cc42638 (2015). The invariant didn't
exist when I added this musttail codepath in ab2090d10765 (2014).
Recently in 28328c3771, I started using this codepath on non-Windows
platforms, and users reported problems during release testing (PR44987).
The issue was already present for users of EH on i686-windows-msvc, so I
added a test for that case as well.
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D76444
(cherry picked from commit ce5173c0e174870934d1b3a026f631d996136191)
Index: tools/clang/lib/CodeGen/CGVTables.cpp
--- tools/clang/lib/CodeGen/CGVTables.cpp.orig
+++ tools/clang/lib/CodeGen/CGVTables.cpp
@@ -437,7 +437,8 @@ void CodeGenFunction::EmitMustTailThunk(GlobalDecl GD,
// Finish the function to maintain CodeGenFunction invariants.
// FIXME: Don't emit unreachable code.
EmitBlock(createBasicBlock());
- FinishFunction();
+
+ FinishThunk();
}
void CodeGenFunction::generateThunk(llvm::Function *Fn,
@@ -564,7 +565,7 @@ llvm::Constant *CodeGenVTables::maybeEmitThunk(GlobalD
CGM.SetLLVMFunctionAttributesForDefinition(GD.getDecl(), ThunkFn);
// Thunks for variadic methods are special because in general variadic
- // arguments cannot be perferctly forwarded. In the general case, clang
+ // arguments cannot be perfectly forwarded. In the general case, clang
// implements such thunks by cloning the original function body. However, for
// thunks with no return adjustment on targets that support musttail, we can
// use musttail to perfectly forward the variadic arguments.

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@ -1,4 +1,4 @@
$OpenBSD: patch-tools_clang_lib_CodeGen_TargetInfo_cpp,v 1.4 2020/08/05 06:49:49 jca Exp $
$OpenBSD: patch-tools_clang_lib_CodeGen_TargetInfo_cpp,v 1.5 2020/08/10 11:38:43 jca Exp $
Add -msvr4-struct-return for powerpc.
@ -110,7 +110,7 @@ Index: tools/clang/lib/CodeGen/TargetInfo.cpp
bool
PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
llvm::Value *Address) const {
@@ -9852,10 +9916,14 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeG
@@ -9853,10 +9917,14 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeG
return SetCGInfo(new ARMTargetCodeGenInfo(Types, Kind));
}

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@ -1,4 +1,4 @@
$OpenBSD: patch-tools_clang_lib_Driver_ToolChains_Arch_X86_cpp,v 1.2 2020/08/07 11:42:02 jca Exp $
$OpenBSD: patch-tools_clang_lib_Driver_ToolChains_Arch_X86_cpp,v 1.3 2020/08/10 11:38:43 jca Exp $
- change the default i386 target to i586 processors
- Turn on -mretpoline by default in clang on amd64.
@ -17,14 +17,15 @@ Index: tools/clang/lib/Driver/ToolChains/Arch/X86.cpp
return "i586";
default:
// Fallback to p4.
@@ -146,6 +146,11 @@ void x86::getX86TargetFeatures(const Driver &D, const
// flags). This is a bit hacky but keeps existing usages working. We should
@@ -147,6 +147,12 @@ void x86::getX86TargetFeatures(const Driver &D, const
// consider deprecating this and instead warn if the user requests external
// retpoline thunks and *doesn't* request some form of retpolines.
auto SpectreOpt = clang::driver::options::ID::OPT_INVALID;
+ if (Triple.isOSOpenBSD() && Triple.getArch() == llvm::Triple::x86_64 &&
+ Args.hasFlag(options::OPT_mretpoline, options::OPT_mno_retpoline, true)) {
+ Features.push_back("+retpoline-indirect-calls");
+ Features.push_back("+retpoline-indirect-branches");
+ SpectreOpt = options::OPT_mretpoline;
+ } else
if (Args.hasArgNoClaim(options::OPT_mretpoline, options::OPT_mno_retpoline,
options::OPT_mspeculative_load_hardening,

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@ -1,11 +1,11 @@
$OpenBSD: patch-tools_clang_lib_Driver_ToolChains_Gnu_cpp,v 1.8 2020/08/05 06:49:49 jca Exp $
$OpenBSD: patch-tools_clang_lib_Driver_ToolChains_Gnu_cpp,v 1.9 2020/08/10 11:38:43 jca Exp $
- Disable IAS for OpenBSD SPARC.
Index: tools/clang/lib/Driver/ToolChains/Gnu.cpp
--- tools/clang/lib/Driver/ToolChains/Gnu.cpp.orig
+++ tools/clang/lib/Driver/ToolChains/Gnu.cpp
@@ -2657,7 +2657,7 @@ bool Generic_GCC::IsIntegratedAssemblerDefault() const
@@ -2659,7 +2659,7 @@ bool Generic_GCC::IsIntegratedAssemblerDefault() const
case llvm::Triple::sparc:
case llvm::Triple::sparcel:
case llvm::Triple::sparcv9:

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@ -1,4 +1,4 @@
$OpenBSD: patch-tools_lld_ELF_Driver_cpp,v 1.14 2020/08/05 06:49:49 jca Exp $
$OpenBSD: patch-tools_lld_ELF_Driver_cpp,v 1.15 2020/08/10 11:38:43 jca Exp $
- Enable PIE by default.
- XXX retpoline, EM_SPARCV9, ???
@ -95,7 +95,7 @@ Index: tools/lld/ELF/Driver.cpp
// Parses -image-base option.
static Optional<uint64_t> getImageBase(opt::InputArgList &args) {
// Because we are using "Config->maxPageSize" here, this function has to be
@@ -1935,6 +1957,11 @@ template <class ELFT> void LinkerDriver::link(opt::Inp
@@ -1944,6 +1966,11 @@ template <class ELFT> void LinkerDriver::link(opt::Inp
// optimizations such as DATA_SEGMENT_ALIGN in linker scripts. LLD's use of it
// is limited to writing trap instructions on the last executable segment.
config->commonPageSize = getCommonPageSize(args);

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@ -1,4 +1,4 @@
$OpenBSD: patch-tools_lld_ELF_Writer_cpp,v 1.13 2020/08/05 06:49:49 jca Exp $
$OpenBSD: patch-tools_lld_ELF_Writer_cpp,v 1.14 2020/08/10 11:38:43 jca Exp $
- Merge '.openbsd.randomdata.*' sections into a single '.openbsd.randomdata'
section when linking, as we do when using ld from binutils.
@ -50,7 +50,7 @@ Index: tools/lld/ELF/Writer.cpp
// Setup MIPS _gp_disp/__gnu_local_gp symbols which should
// be equal to the _gp symbol's value.
if (ElfSym::mipsGp) {
@@ -2252,6 +2261,31 @@ template <class ELFT> void Writer<ELFT>::fixSectionAli
@@ -2265,6 +2274,31 @@ template <class ELFT> void Writer<ELFT>::fixSectionAli
};
}
};

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@ -1,6 +1,6 @@
@comment $OpenBSD: PLIST-main,v 1.19 2020/08/07 11:42:02 jca Exp $
@pkgpath devel/llvm
@comment $OpenBSD: PLIST-main,v 1.20 2020/08/10 11:38:43 jca Exp $
@conflict lldb-<10.0.0p0
@pkgpath devel/llvm
@bin bin/bugpoint
@bin bin/c-index-test
bin/clang
@ -1192,6 +1192,9 @@ include/llvm/CodeGen/ParallelCG.h
include/llvm/CodeGen/Passes.h
include/llvm/CodeGen/PreISelIntrinsicLowering.h
include/llvm/CodeGen/PseudoSourceValue.h
include/llvm/CodeGen/RDFGraph.h
include/llvm/CodeGen/RDFLiveness.h
include/llvm/CodeGen/RDFRegisters.h
include/llvm/CodeGen/ReachingDefAnalysis.h
include/llvm/CodeGen/RegAllocPBQP.h
include/llvm/CodeGen/RegAllocRegistry.h
@ -2501,6 +2504,7 @@ lib/cmake/llvm/HandleLLVMOptions.cmake
lib/cmake/llvm/HandleLLVMStdlib.cmake
lib/cmake/llvm/LLVM-Config.cmake
lib/cmake/llvm/LLVMConfig.cmake
lib/cmake/llvm/LLVMConfigExtensions.cmake
lib/cmake/llvm/LLVMConfigVersion.cmake
lib/cmake/llvm/LLVMDistributionSupport.cmake
lib/cmake/llvm/LLVMExports${MODCMAKE_BUILD_SUFFIX}
@ -2559,6 +2563,7 @@ lib/cmake/llvm/VersionFromVCS.cmake
@static-lib lib/libLLVMDemangle.a
@static-lib lib/libLLVMDlltoolDriver.a
@static-lib lib/libLLVMExecutionEngine.a
@static-lib lib/libLLVMExtensions.a
@static-lib lib/libLLVMFrontendOpenMP.a
@static-lib lib/libLLVMFuzzMutate.a
@static-lib lib/libLLVMGlobalISel.a