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ok espie@ pascal@
This commit is contained in:
tobiasu 2013-02-04 21:23:40 +00:00
parent eb4779c6fb
commit 821c89e81c
10 changed files with 1419 additions and 6 deletions
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11
lang/gcc/4.2/Makefile
View File

@ -1,7 +1,7 @@
# $OpenBSD: Makefile,v 1.92 2013/02/01 16:34:36 naddy Exp $
# $OpenBSD: Makefile,v 1.93 2013/02/04 21:23:40 tobiasu Exp $
# TODO: hppa mips64 mips64el sh sparc
ONLY_FOR_ARCHS = alpha i386 sparc64 powerpc amd64 arm
# TODO: hppa mips64 mips64el sparc
ONLY_FOR_ARCHS = alpha i386 sparc64 powerpc amd64 arm sh
DPB_PROPERTIES = parallel
@ -171,6 +171,11 @@ CONFIGURE_ARGS += --with-gnu-as
CONFIGURE_ARGS += --with-gnu-ld
CONFIGURE_ARGS += ${CONFIGURE_SHARED}
.if ${MACHINE_ARCH} == "sh"
CONFIGURE_ARGS += -disable-multilib
CONFIGURE_ARGS += --with-endian=little
.endif
post-patch:
cd ${WRKDIST}/libstdc++-v3 && AUTOCONF_VERSION=2.59 autoconf

17
lang/gcc/4.2/patches/patch-gcc_config_gcc
View File

@ -1,5 +1,5 @@
--- gcc/config.gcc.orig Thu Mar 13 20:11:43 2008
+++ gcc/config.gcc Sat Jan 26 17:24:34 2013
+++ gcc/config.gcc Tue Jan 29 02:22:59 2013
@@ -555,6 +555,11 @@ case ${target} in
*-*-openbsd2.*|*-*-openbsd3.[012])
tm_defines="${tm_defines} HAS_LIBC_R=1" ;;
@ -91,7 +91,18 @@
powerpc64-*-linux*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h freebsd-spec.h rs6000/sysv4.h"
test x$with_cpu != x || cpu_is_64bit=yes
@@ -2163,7 +2178,8 @@ sparc-*-netbsdelf*)
@@ -2142,6 +2157,10 @@ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | \
fi
use_fixproto=yes
;;
+sh-*-openbsd*)
+ tm_file="sh/little.h sh/sh.h dbxelf.h elfos.h sh/elf.h openbsd.h openbsd-libpthread.h sh/openbsd.h"
+ tmake_file="${tmake_file} sh/t-sh"
+;;
sh-*-rtemscoff*)
tmake_file="sh/t-sh t-rtems sh/t-rtems"
tm_file="${tm_file} dbxcoff.h sh/coff.h sh/rtems.h rtems.h"
@@ -2163,7 +2182,8 @@ sparc-*-netbsdelf*)
extra_options="${extra_options} sparc/long-double-switch.opt"
;;
sparc64-*-openbsd*)
@ -101,7 +112,7 @@
extra_options="${extra_options} sparc/little-endian.opt"
gas=yes gnu_ld=yes
with_cpu=ultrasparc
@@ -2408,7 +2424,7 @@ vax-*-netbsd*)
@@ -2408,7 +2428,7 @@ vax-*-netbsd*)
use_collect2=yes
;;
vax-*-openbsd*)

668
lang/gcc/4.2/patches/patch-gcc_config_sh_lib1funcs_asm Normal file
View File

@ -0,0 +1,668 @@
$OpenBSD: patch-gcc_config_sh_lib1funcs_asm,v 1.1 2013/02/04 21:23:40 tobiasu Exp $
--- gcc/config/sh/lib1funcs.asm.orig Tue Jan 29 01:44:27 2013
+++ gcc/config/sh/lib1funcs.asm Tue Jan 29 01:51:33 2013
@@ -1011,7 +1011,7 @@ GLOBAL(sdivsi3_i4):
#ifdef L_sdivsi3
/* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
sh2e/sh3e code. */
-#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__)
+#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__) || defined (__OpenBSD__)
!!
!! Steve Chamberlain
!! sac@cygnus.com
@@ -1452,7 +1452,7 @@ L1:
#ifdef L_udivsi3
/* __SH4_SINGLE_ONLY__ keeps this part for link compatibility with
sh2e/sh3e code. */
-#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__)
+#if (! defined(__SH4__) && ! defined (__SH4_SINGLE__)) || defined (__linux__) || defined (__OpenBSD__)
!! args in r4 and r5, result in r0, clobbers r4, pr, and t bit
.global GLOBAL(udivsi3)
@@ -2986,8 +2986,8 @@ GLOBAL(GCC_pop_shmedia_regs_nofpu):
#endif /* __SH5__ == 32 */
#endif /* L_push_pop_shmedia_regs */
-#ifdef L_div_table
#if __SH5__
+#ifdef L_div_table
#if defined(__pic__) && defined(__SHMEDIA__)
.global GLOBAL(sdivsi3)
FUNC(GLOBAL(sdivsi3))
@@ -3214,635 +3214,8 @@ GLOBAL(div_table):
.word 17738
.word 17136
.word 16639
-
-#elif defined (__SH3__) || defined (__SH3E__) || defined (__SH4__) || defined (__SH4_SINGLE__) || defined (__SH4_SINGLE_ONLY__) || defined (__SH4_NOFPU__)
-/* This code used shld, thus is not suitable for SH1 / SH2. */
-
-/* Signed / unsigned division without use of FPU, optimized for SH4.
- Uses a lookup table for divisors in the range -128 .. +128, and
- div1 with case distinction for larger divisors in three more ranges.
- The code is lumped together with the table to allow the use of mova. */
-#ifdef __LITTLE_ENDIAN__
-#define L_LSB 0
-#define L_LSWMSB 1
-#define L_MSWLSB 2
-#else
-#define L_LSB 3
-#define L_LSWMSB 2
-#define L_MSWLSB 1
-#endif
-
- .balign 4
- .global GLOBAL(udivsi3_i4i)
- FUNC(GLOBAL(udivsi3_i4i))
-GLOBAL(udivsi3_i4i):
- mov.w LOCAL(c128_w), r1
- div0u
- mov r4,r0
- shlr8 r0
- cmp/hi r1,r5
- extu.w r5,r1
- bf LOCAL(udiv_le128)
- cmp/eq r5,r1
- bf LOCAL(udiv_ge64k)
- shlr r0
- mov r5,r1
- shll16 r5
- mov.l r4,@-r15
- div1 r5,r0
- mov.l r1,@-r15
- div1 r5,r0
- div1 r5,r0
- bra LOCAL(udiv_25)
- div1 r5,r0
-
-LOCAL(div_le128):
- mova LOCAL(div_table_ix),r0
- bra LOCAL(div_le128_2)
- mov.b @(r0,r5),r1
-LOCAL(udiv_le128):
- mov.l r4,@-r15
- mova LOCAL(div_table_ix),r0
- mov.b @(r0,r5),r1
- mov.l r5,@-r15
-LOCAL(div_le128_2):
- mova LOCAL(div_table_inv),r0
- mov.l @(r0,r1),r1
- mov r5,r0
- tst #0xfe,r0
- mova LOCAL(div_table_clz),r0
- dmulu.l r1,r4
- mov.b @(r0,r5),r1
- bt/s LOCAL(div_by_1)
- mov r4,r0
- mov.l @r15+,r5
- sts mach,r0
- /* clrt */
- addc r4,r0
- mov.l @r15+,r4
- rotcr r0
- rts
- shld r1,r0
-
-LOCAL(div_by_1_neg):
- neg r4,r0
-LOCAL(div_by_1):
- mov.l @r15+,r5
- rts
- mov.l @r15+,r4
-
-LOCAL(div_ge64k):
- bt/s LOCAL(div_r8)
- div0u
- shll8 r5
- bra LOCAL(div_ge64k_2)
- div1 r5,r0
-LOCAL(udiv_ge64k):
- cmp/hi r0,r5
- mov r5,r1
- bt LOCAL(udiv_r8)
- shll8 r5
- mov.l r4,@-r15
- div1 r5,r0
- mov.l r1,@-r15
-LOCAL(div_ge64k_2):
- div1 r5,r0
- mov.l LOCAL(zero_l),r1
- .rept 4
- div1 r5,r0
- .endr
- mov.l r1,@-r15
- div1 r5,r0
- mov.w LOCAL(m256_w),r1
- div1 r5,r0
- mov.b r0,@(L_LSWMSB,r15)
- xor r4,r0
- and r1,r0
- bra LOCAL(div_ge64k_end)
- xor r4,r0
-
-LOCAL(div_r8):
- shll16 r4
- bra LOCAL(div_r8_2)
- shll8 r4
-LOCAL(udiv_r8):
- mov.l r4,@-r15
- shll16 r4
- clrt
- shll8 r4
- mov.l r5,@-r15
-LOCAL(div_r8_2):
- rotcl r4
- mov r0,r1
- div1 r5,r1
- mov r4,r0
- rotcl r0
- mov r5,r4
- div1 r5,r1
- .rept 5
- rotcl r0; div1 r5,r1
- .endr
- rotcl r0
- mov.l @r15+,r5
- div1 r4,r1
- mov.l @r15+,r4
- rts
- rotcl r0
-
- ENDFUNC(GLOBAL(udivsi3_i4i))
-
- .global GLOBAL(sdivsi3_i4i)
- FUNC(GLOBAL(sdivsi3_i4i))
- /* This is link-compatible with a GLOBAL(sdivsi3) call,
- but we effectively clobber only r1. */
-GLOBAL(sdivsi3_i4i):
- mov.l r4,@-r15
- cmp/pz r5
- mov.w LOCAL(c128_w), r1
- bt/s LOCAL(pos_divisor)
- cmp/pz r4
- mov.l r5,@-r15
- neg r5,r5
- bt/s LOCAL(neg_result)
- cmp/hi r1,r5
- neg r4,r4
-LOCAL(pos_result):
- extu.w r5,r0
- bf LOCAL(div_le128)
- cmp/eq r5,r0
- mov r4,r0
- shlr8 r0
- bf/s LOCAL(div_ge64k)
- cmp/hi r0,r5
- div0u
- shll16 r5
- div1 r5,r0
- div1 r5,r0
- div1 r5,r0
-LOCAL(udiv_25):
- mov.l LOCAL(zero_l),r1
- div1 r5,r0
- div1 r5,r0
- mov.l r1,@-r15
- .rept 3
- div1 r5,r0
- .endr
- mov.b r0,@(L_MSWLSB,r15)
- xtrct r4,r0
- swap.w r0,r0
- .rept 8
- div1 r5,r0
- .endr
- mov.b r0,@(L_LSWMSB,r15)
-LOCAL(div_ge64k_end):
- .rept 8
- div1 r5,r0
- .endr
- mov.l @r15+,r4 ! zero-extension and swap using LS unit.
- extu.b r0,r0
- mov.l @r15+,r5
- or r4,r0
- mov.l @r15+,r4
- rts
- rotcl r0
-
-LOCAL(div_le128_neg):
- tst #0xfe,r0
- mova LOCAL(div_table_ix),r0
- mov.b @(r0,r5),r1
- mova LOCAL(div_table_inv),r0
- bt/s LOCAL(div_by_1_neg)
- mov.l @(r0,r1),r1
- mova LOCAL(div_table_clz),r0
- dmulu.l r1,r4
- mov.b @(r0,r5),r1
- mov.l @r15+,r5
- sts mach,r0
- /* clrt */
- addc r4,r0
- mov.l @r15+,r4
- rotcr r0
- shld r1,r0
- rts
- neg r0,r0
-
-LOCAL(pos_divisor):
- mov.l r5,@-r15
- bt/s LOCAL(pos_result)
- cmp/hi r1,r5
- neg r4,r4
-LOCAL(neg_result):
- extu.w r5,r0
- bf LOCAL(div_le128_neg)
- cmp/eq r5,r0
- mov r4,r0
- shlr8 r0
- bf/s LOCAL(div_ge64k_neg)
- cmp/hi r0,r5
- div0u
- mov.l LOCAL(zero_l),r1
- shll16 r5
- div1 r5,r0
- mov.l r1,@-r15
- .rept 7
- div1 r5,r0
- .endr
- mov.b r0,@(L_MSWLSB,r15)
- xtrct r4,r0
- swap.w r0,r0
- .rept 8
- div1 r5,r0
- .endr
- mov.b r0,@(L_LSWMSB,r15)
-LOCAL(div_ge64k_neg_end):
- .rept 8
- div1 r5,r0
- .endr
- mov.l @r15+,r4 ! zero-extension and swap using LS unit.
- extu.b r0,r1
- mov.l @r15+,r5
- or r4,r1
-LOCAL(div_r8_neg_end):
- mov.l @r15+,r4
- rotcl r1
- rts
- neg r1,r0
-
-LOCAL(div_ge64k_neg):
- bt/s LOCAL(div_r8_neg)
- div0u
- shll8 r5
- mov.l LOCAL(zero_l),r1
- .rept 6
- div1 r5,r0
- .endr
- mov.l r1,@-r15
- div1 r5,r0
- mov.w LOCAL(m256_w),r1
- div1 r5,r0
- mov.b r0,@(L_LSWMSB,r15)
- xor r4,r0
- and r1,r0
- bra LOCAL(div_ge64k_neg_end)
- xor r4,r0
-
-LOCAL(c128_w):
- .word 128
-
-LOCAL(div_r8_neg):
- clrt
- shll16 r4
- mov r4,r1
- shll8 r1
- mov r5,r4
- .rept 7
- rotcl r1; div1 r5,r0
- .endr
- mov.l @r15+,r5
- rotcl r1
- bra LOCAL(div_r8_neg_end)
- div1 r4,r0
-
-LOCAL(m256_w):
- .word 0xff00
-/* This table has been generated by divtab-sh4.c. */
- .balign 4
-LOCAL(div_table_clz):
- .byte 0
- .byte 1
- .byte 0
- .byte -1
- .byte -1
- .byte -2
- .byte -2
- .byte -2
- .byte -2
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -3
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -4
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -5
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
- .byte -6
-/* Lookup table translating positive divisor to index into table of
- normalized inverse. N.B. the '0' entry is also the last entry of the
- previous table, and causes an unaligned access for division by zero. */
-LOCAL(div_table_ix):
- .byte -6
- .byte -128
- .byte -128
- .byte 0
- .byte -128
- .byte -64
- .byte 0
- .byte 64
- .byte -128
- .byte -96
- .byte -64
- .byte -32
- .byte 0
- .byte 32
- .byte 64
- .byte 96
- .byte -128
- .byte -112
- .byte -96
- .byte -80
- .byte -64
- .byte -48
- .byte -32
- .byte -16
- .byte 0
- .byte 16
- .byte 32
- .byte 48
- .byte 64
- .byte 80
- .byte 96
- .byte 112
- .byte -128
- .byte -120
- .byte -112
- .byte -104
- .byte -96
- .byte -88
- .byte -80
- .byte -72
- .byte -64
- .byte -56
- .byte -48
- .byte -40
- .byte -32
- .byte -24
- .byte -16
- .byte -8
- .byte 0
- .byte 8
- .byte 16
- .byte 24
- .byte 32
- .byte 40
- .byte 48
- .byte 56
- .byte 64
- .byte 72
- .byte 80
- .byte 88
- .byte 96
- .byte 104
- .byte 112
- .byte 120
- .byte -128
- .byte -124
- .byte -120
- .byte -116
- .byte -112
- .byte -108
- .byte -104
- .byte -100
- .byte -96
- .byte -92
- .byte -88
- .byte -84
- .byte -80
- .byte -76
- .byte -72
- .byte -68
- .byte -64
- .byte -60
- .byte -56
- .byte -52
- .byte -48
- .byte -44
- .byte -40
- .byte -36
- .byte -32
- .byte -28
- .byte -24
- .byte -20
- .byte -16
- .byte -12
- .byte -8
- .byte -4
- .byte 0
- .byte 4
- .byte 8
- .byte 12
- .byte 16
- .byte 20
- .byte 24
- .byte 28
- .byte 32
- .byte 36
- .byte 40
- .byte 44
- .byte 48
- .byte 52
- .byte 56
- .byte 60
- .byte 64
- .byte 68
- .byte 72
- .byte 76
- .byte 80
- .byte 84
- .byte 88
- .byte 92
- .byte 96
- .byte 100
- .byte 104
- .byte 108
- .byte 112
- .byte 116
- .byte 120
- .byte 124
- .byte -128
-/* 1/64 .. 1/127, normalized. There is an implicit leading 1 in bit 32. */
- .balign 4
-LOCAL(zero_l):
- .long 0x0
- .long 0xF81F81F9
- .long 0xF07C1F08
- .long 0xE9131AC0
- .long 0xE1E1E1E2
- .long 0xDAE6076C
- .long 0xD41D41D5
- .long 0xCD856891
- .long 0xC71C71C8
- .long 0xC0E07039
- .long 0xBACF914D
- .long 0xB4E81B4F
- .long 0xAF286BCB
- .long 0xA98EF607
- .long 0xA41A41A5
- .long 0x9EC8E952
- .long 0x9999999A
- .long 0x948B0FCE
- .long 0x8F9C18FA
- .long 0x8ACB90F7
- .long 0x86186187
- .long 0x81818182
- .long 0x7D05F418
- .long 0x78A4C818
- .long 0x745D1746
- .long 0x702E05C1
- .long 0x6C16C16D
- .long 0x68168169
- .long 0x642C8591
- .long 0x60581606
- .long 0x5C9882BA
- .long 0x58ED2309
-LOCAL(div_table_inv):
- .long 0x55555556
- .long 0x51D07EAF
- .long 0x4E5E0A73
- .long 0x4AFD6A06
- .long 0x47AE147B
- .long 0x446F8657
- .long 0x41414142
- .long 0x3E22CBCF
- .long 0x3B13B13C
- .long 0x38138139
- .long 0x3521CFB3
- .long 0x323E34A3
- .long 0x2F684BDB
- .long 0x2C9FB4D9
- .long 0x29E4129F
- .long 0x27350B89
- .long 0x24924925
- .long 0x21FB7813
- .long 0x1F7047DD
- .long 0x1CF06ADB
- .long 0x1A7B9612
- .long 0x18118119
- .long 0x15B1E5F8
- .long 0x135C8114
- .long 0x11111112
- .long 0xECF56BF
- .long 0xC9714FC
- .long 0xA6810A7
- .long 0x8421085
- .long 0x624DD30
- .long 0x4104105
- .long 0x2040811
- /* maximum error: 0.987342 scaled: 0.921875*/
-
- ENDFUNC(GLOBAL(sdivsi3_i4i))
-#endif /* SH3 / SH4 */
-
#endif /* L_div_table */
+#endif /* __SH5__ */
#ifdef L_udiv_qrnnd_16
#if !__SHMEDIA__

143
lang/gcc/4.2/patches/patch-gcc_config_sh_openbsd_h Normal file
View File

@ -0,0 +1,143 @@
$OpenBSD: patch-gcc_config_sh_openbsd_h,v 1.1 2013/02/04 21:23:40 tobiasu Exp $
--- gcc/config/sh/openbsd.h.orig Tue Jan 29 02:07:39 2013
+++ gcc/config/sh/openbsd.h Tue Jan 29 10:36:59 2013
@@ -0,0 +1,139 @@
+/* Definitions for SH running OpenBSD using ELF
+ Copyright (C) 2002 - 2006 Free Software Foundation, Inc.
+ Adapted from the NetBSD configuration contributed by Wasabi Systems, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING. If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA. */
+
+/* Get generic OpenBSD definitions. */
+#include <config/openbsd.h>
+
+#define TARGET_VERSION_ENDIAN "le"
+#define TARGET_VERSION_CPU "sh"
+
+/* Enable DWARF 2 exceptions. */
+#undef DWARF2_UNWIND_INFO
+#define DWARF2_UNWIND_INFO 1
+
+#undef TARGET_CPU_DEFAULT
+#define TARGET_CPU_DEFAULT SELECT_SH4
+
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT \
+ (TARGET_CPU_DEFAULT | MASK_USERMODE | TARGET_ENDIAN_DEFAULT)
+
+#define TARGET_OS_CPP_BUILTINS() OPENBSD_OS_CPP_BUILTINS_ELF()
+
+/* Layout of source language data types */
+
+/* This must agree with <machine/_types.h> */
+#undef SIZE_TYPE
+#define SIZE_TYPE "long unsigned int"
+
+#undef PTRDIFF_TYPE
+#define PTRDIFF_TYPE "long int"
+
+#undef INTMAX_TYPE
+#define INTMAX_TYPE "long long int"
+
+#undef UINTMAX_TYPE
+#define UINTMAX_TYPE "long long unsigned int"
+
+#undef WCHAR_TYPE
+#define WCHAR_TYPE "int"
+
+#undef WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE 32
+
+#undef LINK_DEFAULT_CPU_EMUL
+#define LINK_DEFAULT_CPU_EMUL ""
+
+#undef SUBTARGET_LINK_EMUL_SUFFIX
+#define SUBTARGET_LINK_EMUL_SUFFIX "_obsd"
+
+#undef LINK_EMUL_PREFIX
+#define LINK_EMUL_PREFIX "sh%{!mb:l}elf"
+
+#undef SUBTARGET_LINK_SPEC
+#ifdef OBSD_NO_DYNAMIC_LIBRARIES
+#define SUBTARGET_LINK_SPEC \
+ "%{g:%{!nostdlib:-L/usr/lib/debug}} %{!nostdlib:%{!r*:%{!e*:-e __start}}} -dc -dp %{assert*}"
+#else
+#define SUBTARGET_LINK_SPEC \
+ "%{g:%{!nostdlib:-L/usr/lib/debug}} \
+ %{!shared:%{!nostdlib:%{!r*:%{!e*:-e __start}}}} \
+ %{shared:-Bshareable -x} -dc -dp %{R*} \
+ %{static:-Bstatic} \
+ %{rdynamic:-export-dynamic} \
+ %{assert*} \
+ %{!dynamic-linker:-dynamic-linker /usr/libexec/ld.so}"
+#endif
+
+
+#undef LINK_SPEC
+#define LINK_SPEC SH_LINK_SPEC
+
+/* As an elf system, we need crtbegin/crtend stuff. */
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC "\
+ %{!shared: %{pg:gcrt0%O%s} %{!pg:%{p:gcrt0%O%s} %{!p:crt0%O%s}} \
+ crtbegin%O%s} %{shared:crtbeginS%O%s}"
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC "%{!shared:crtend%O%s} %{shared:crtendS%O%s}"
+
+/* Needed for ELF (inspired by netbsd-elf). */
+#undef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX "."
+
+/* Provide a CPP_SPEC appropriate for OpenBSD. */
+#undef SUBTARGET_CPP_SPEC
+#define SUBTARGET_CPP_SPEC OBSD_CPP_SPEC
+
+/* Define because we use the label and we do not need them. */
+#define NO_PROFILE_COUNTERS 1
+
+#undef FUNCTION_PROFILER
+#define FUNCTION_PROFILER(STREAM,LABELNO) \
+do \
+ { \
+ if (TARGET_SHMEDIA32 || TARGET_SHMEDIA64) \
+ { \
+ /* FIXME */ \
+ sorry ("unimplemented-shmedia profiling"); \
+ } \
+ else \
+ { \
+ fprintf((STREAM), "\tmov.l\t%sLP%d,r1\n", \
+ LOCAL_LABEL_PREFIX, (LABELNO)); \
+ fprintf((STREAM), "\tmova\t%sLP%dr,r0\n", \
+ LOCAL_LABEL_PREFIX, (LABELNO)); \
+ fprintf((STREAM), "\tjmp\t@r1\n"); \
+ fprintf((STREAM), "\tnop\n"); \
+ fprintf((STREAM), "\t.align\t2\n"); \
+ fprintf((STREAM), "%sLP%d:\t.long\t__mcount\n", \
+ LOCAL_LABEL_PREFIX, (LABELNO)); \
+ fprintf((STREAM), "%sLP%dr:\n", LOCAL_LABEL_PREFIX, (LABELNO)); \
+ } \
+ } \
+while (0)
+
+/* Since libgcc is compiled with -fpic for this target, we can't use
+ __sdivsi3_1 as the division strategy for -O0 and -Os. */
+#undef SH_DIV_STRATEGY_DEFAULT
+#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL2
+#undef SH_DIV_STR_FOR_SIZE
+#define SH_DIV_STR_FOR_SIZE "call2"

12
lang/gcc/4.2/patches/patch-gcc_config_sh_sh-protos_h Normal file
View File

@ -0,0 +1,12 @@
$OpenBSD: patch-gcc_config_sh_sh-protos_h,v 1.1 2013/02/04 21:23:40 tobiasu Exp $
--- gcc/config/sh/sh-protos.h.orig Tue Jan 29 01:42:28 2013
+++ gcc/config/sh/sh-protos.h Tue Jan 29 01:44:01 2013
@@ -153,6 +153,8 @@ extern void sh_pr_nosave_low_regs (struct cpp_reader *
extern rtx function_symbol (rtx, const char *, enum sh_function_kind);
extern rtx sh_get_pr_initial_val (void);
+extern void sh_override_options (void);
+
extern rtx sh_function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
extern void sh_function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int);
extern int sh_pass_in_reg_p (CUMULATIVE_ARGS *, enum machine_mode, tree);

220
lang/gcc/4.2/patches/patch-gcc_config_sh_sh_c Normal file
View File

@ -0,0 +1,220 @@
$OpenBSD: patch-gcc_config_sh_sh_c,v 1.1 2013/02/04 21:23:40 tobiasu Exp $
--- gcc/config/sh/sh.c.orig Tue Jan 29 01:54:03 2013
+++ gcc/config/sh/sh.c Tue Jan 29 02:01:12 2013
@@ -3477,6 +3477,10 @@ untangle_mova (int *num_mova, rtx *first_mova, rtx new
if (optimize)
{
+ /* If NEW_MOVA has no address yet, it will be handled later. */
+ if (INSN_ADDRESSES_SIZE() <= (unsigned) INSN_UID (new_mova))
+ return -1;
+
n_addr = INSN_ADDRESSES (INSN_UID (new_mova));
n_target = INSN_ADDRESSES (INSN_UID (XEXP (MOVA_LABELREF (new_mova), 0)));
if (n_addr > n_target || n_addr + 1022 < n_target)
@@ -10944,3 +10948,205 @@ sh_secondary_reload (bool in_p, rtx x, enum reg_class
enum sh_divide_strategy_e sh_div_strategy = SH_DIV_STRATEGY_DEFAULT;
#include "gt-sh.h"
+
+void
+sh_override_options (void)
+{
+ int regno;
+
+ if (flag_finite_math_only == 2)
+ flag_finite_math_only
+ = !flag_signaling_nans && TARGET_SH2E && ! TARGET_IEEE;
+ if (TARGET_SH2E && !flag_finite_math_only)
+ target_flags |= MASK_IEEE;
+ sh_cpu = CPU_SH1;
+ assembler_dialect = 0;
+ if (TARGET_SH2)
+ sh_cpu = CPU_SH2;
+ if (TARGET_SH2E)
+ sh_cpu = CPU_SH2E;
+ if (TARGET_SH2A)
+ {
+ sh_cpu = CPU_SH2A;
+ if (TARGET_SH2A_DOUBLE)
+ target_flags |= MASK_FMOVD;
+ }
+ if (TARGET_SH3)
+ sh_cpu = CPU_SH3;
+ if (TARGET_SH3E)
+ sh_cpu = CPU_SH3E;
+ if (TARGET_SH4)
+ {
+ assembler_dialect = 1;
+ sh_cpu = CPU_SH4;
+ }
+ if (TARGET_SH4A_ARCH)
+ {
+ assembler_dialect = 1;
+ sh_cpu = CPU_SH4A;
+ }
+ if (TARGET_SH5)
+ {
+ sh_cpu = CPU_SH5;
+ target_flags |= MASK_ALIGN_DOUBLE;
+ if (TARGET_SHMEDIA_FPU)
+ target_flags |= MASK_FMOVD;
+ if (TARGET_SHMEDIA)
+ {
+ /* There are no delay slots on SHmedia. */
+ flag_delayed_branch = 0;
+ /* Relaxation isn't yet supported for SHmedia */
+ target_flags &= ~MASK_RELAX;
+ /* After reload, if conversion does little good but can cause
+ ICEs:
+ - find_if_block doesn't do anything for SH because we don't
+ have conditional execution patterns. (We use conditional
+ move patterns, which are handled differently, and only
+ before reload).
+ - find_cond_trap doesn't do anything for the SH because we \
+ don't have conditional traps.
+ - find_if_case_1 uses redirect_edge_and_branch_force in
+ the only path that does an optimization, and this causes
+ an ICE when branch targets are in registers.
+ - find_if_case_2 doesn't do anything for the SHmedia after
+ reload except when it can redirect a tablejump - and
+ that's rather rare. */
+ flag_if_conversion2 = 0;
+ if (! strcmp (sh_div_str, "call"))
+ sh_div_strategy = SH_DIV_CALL;
+ else if (! strcmp (sh_div_str, "call2"))
+ sh_div_strategy = SH_DIV_CALL2;
+ if (! strcmp (sh_div_str, "fp") && TARGET_FPU_ANY)
+ sh_div_strategy = SH_DIV_FP;
+ else if (! strcmp (sh_div_str, "inv"))
+ sh_div_strategy = SH_DIV_INV;
+ else if (! strcmp (sh_div_str, "inv:minlat"))
+ sh_div_strategy = SH_DIV_INV_MINLAT;
+ else if (! strcmp (sh_div_str, "inv20u"))
+ sh_div_strategy = SH_DIV_INV20U;
+ else if (! strcmp (sh_div_str, "inv20l"))
+ sh_div_strategy = SH_DIV_INV20L;
+ else if (! strcmp (sh_div_str, "inv:call2"))
+ sh_div_strategy = SH_DIV_INV_CALL2;
+ else if (! strcmp (sh_div_str, "inv:call"))
+ sh_div_strategy = SH_DIV_INV_CALL;
+ else if (! strcmp (sh_div_str, "inv:fp"))
+ {
+ if (TARGET_FPU_ANY)
+ sh_div_strategy = SH_DIV_INV_FP;
+ else
+ sh_div_strategy = SH_DIV_INV;
+ }
+ }
+ /* -fprofile-arcs needs a working libgcov . In unified tree
+ configurations with newlib, this requires to configure with
+ --with-newlib --with-headers. But there is no way to check
+ here we have a working libgcov, so just assume that we have. */
+ if (profile_flag)
+ warning (0, "profiling is still experimental for this target");
+ }
+ else
+ {
+ /* Only the sh64-elf assembler fully supports .quad properly. */
+ targetm.asm_out.aligned_op.di = NULL;
+ targetm.asm_out.unaligned_op.di = NULL;
+ }
+ if (!TARGET_SH1)
+ TARGET_PRETEND_CMOVE = 0;
+ if (sh_divsi3_libfunc[0])
+ ; /* User supplied - leave it alone. */
+ else if (TARGET_HARD_SH4 && TARGET_SH2E)
+ sh_divsi3_libfunc = "__sdivsi3_i4";
+ else if (TARGET_SH5)
+ {
+ if (TARGET_FPU_ANY && TARGET_SH1)
+ sh_divsi3_libfunc = "__sdivsi3_i4";
+ else
+ sh_divsi3_libfunc = "__sdivsi3_1";
+ }
+ else
+ sh_divsi3_libfunc = "__sdivsi3";
+ if (TARGET_FMOVD)
+ reg_class_from_letter['e' - 'a'] = NO_REGS;
+
+ for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
+ if (! VALID_REGISTER_P (regno))
+ sh_register_names[regno][0] = '\0';
+
+ for (regno = 0; regno < ADDREGNAMES_SIZE; regno++)
+ if (! VALID_REGISTER_P (ADDREGNAMES_REGNO (regno)))
+ sh_additional_register_names[regno][0] = '\0';
+
+ if (flag_omit_frame_pointer < 0)
+ {
+ /* The debugging information is sufficient,
+ but gdb doesn't implement this yet */
+ if (0)
+ flag_omit_frame_pointer
+ = (PREFERRED_DEBUGGING_TYPE == DWARF2_DEBUG);
+ else
+ flag_omit_frame_pointer = 0;
+ }
+
+ if ((flag_pic && ! TARGET_PREFERGOT)
+ || (TARGET_SHMEDIA && !TARGET_PT_FIXED))
+ flag_no_function_cse = 1;
+
+ if (SMALL_REGISTER_CLASSES)
+ {
+ /* Never run scheduling before reload, since that can
+ break global alloc, and generates slower code anyway due
+ to the pressure on R0. */
+ /* Enable sched1 for SH4; ready queue will be reordered by
+ the target hooks when pressure is high. We can not do this for
+ SH3 and lower as they give spill failures for R0. */
+ if (!TARGET_HARD_SH4 || flag_pic)
+ flag_schedule_insns = 0;
+ /* ??? Current exception handling places basic block boundaries
+ after call_insns. It causes the high pressure on R0 and gives
+ spill failures for R0 in reload. See PR 22553 and the thread
+ on gcc-patches
+ <http://gcc.gnu.org/ml/gcc-patches/2005-10/msg00816.html>. */
+ else if (flag_exceptions)
+ {
+ if (flag_schedule_insns == 1)
+ warning (0, "ignoring -fschedule-insns because of exception handling bug");
+ flag_schedule_insns = 0;
+ }
+ }
+
+ if (align_loops == 0)
+ align_loops = 1 << (TARGET_SH5 ? 3 : 2);
+#if defined(OPENBSD_NATIVE) || defined(OPENBSD_CROSS)
+ /* Do not align jump targets to cache line boundaries at -O2 */
+ if (align_jumps == 0)
+ align_jumps = 2;
+#else
+ if (align_jumps == 0)
+ align_jumps = 1 << CACHE_LOG;
+#endif
+ else if (align_jumps < (TARGET_SHMEDIA ? 4 : 2))
+ align_jumps = TARGET_SHMEDIA ? 4 : 2;
+
+ /* Allocation boundary (in *bytes*) for the code of a function.
+ SH1: 32 bit alignment is faster, because instructions are always
+ fetched as a pair from a longword boundary.
+ SH2 .. SH5 : align to cache line start. */
+ if (align_functions == 0)
+ align_functions
+ = TARGET_SMALLCODE ? FUNCTION_BOUNDARY/8 : (1 << CACHE_LOG);
+ /* The linker relaxation code breaks when a function contains
+ alignments that are larger than that at the start of a
+ compilation unit. */
+ if (TARGET_RELAX)
+ {
+ int min_align
+ = align_loops > align_jumps ? align_loops : align_jumps;
+
+ /* Also take possible .long constants / mova tables int account. */
+ if (min_align < 4)
+ min_align = 4;
+ if (align_functions < min_align)
+ align_functions = min_align;
+ }
+}

273
lang/gcc/4.2/patches/patch-gcc_config_sh_sh_h Normal file
View File

@ -0,0 +1,273 @@
$OpenBSD: patch-gcc_config_sh_sh_h,v 1.1 2013/02/04 21:23:40 tobiasu Exp $
--- gcc/config/sh/sh.h.orig Tue Jan 29 02:01:36 2013
+++ gcc/config/sh/sh.h Tue Jan 29 02:04:51 2013
@@ -233,9 +233,6 @@ do { \
#define TARGET_DIVIDE_INV20L (sh_div_strategy == SH_DIV_INV20L)
#define TARGET_DIVIDE_INV_CALL (sh_div_strategy == SH_DIV_INV_CALL)
#define TARGET_DIVIDE_INV_CALL2 (sh_div_strategy == SH_DIV_INV_CALL2)
-#define TARGET_DIVIDE_CALL_DIV1 (sh_div_strategy == SH_DIV_CALL_DIV1)
-#define TARGET_DIVIDE_CALL_FP (sh_div_strategy == SH_DIV_CALL_FP)
-#define TARGET_DIVIDE_CALL_TABLE (sh_div_strategy == SH_DIV_CALL_TABLE)
#define SELECT_SH1 (MASK_SH1)
#define SELECT_SH2 (MASK_SH2 | SELECT_SH1)
@@ -494,24 +491,16 @@ do { \
extern int assembler_dialect;
enum sh_divide_strategy_e {
- /* SH5 strategies. */
SH_DIV_CALL,
SH_DIV_CALL2,
- SH_DIV_FP, /* We could do this also for SH4. */
+ SH_DIV_FP,
SH_DIV_INV,
SH_DIV_INV_MINLAT,
SH_DIV_INV20U,
SH_DIV_INV20L,
SH_DIV_INV_CALL,
SH_DIV_INV_CALL2,
- SH_DIV_INV_FP,
- /* SH1 .. SH4 strategies. Because of the small number of registers
- available, the compiler uses knowledge of the actual set of registers
- being clobbered by the different functions called. */
- SH_DIV_CALL_DIV1, /* No FPU, medium size, highest latency. */
- SH_DIV_CALL_FP, /* FPU needed, small size, high latency. */
- SH_DIV_CALL_TABLE, /* No FPU, large size, medium latency. */
- SH_DIV_INTRINSIC
+ SH_DIV_INV_FP
};
extern enum sh_divide_strategy_e sh_div_strategy;
@@ -520,231 +509,7 @@ extern enum sh_divide_strategy_e sh_div_strategy;
#define SH_DIV_STRATEGY_DEFAULT SH_DIV_CALL
#endif
-#define OVERRIDE_OPTIONS \
-do { \
- int regno; \
- \
- if (flag_finite_math_only == 2) \
- flag_finite_math_only \
- = !flag_signaling_nans && TARGET_SH2E && ! TARGET_IEEE; \
- if (TARGET_SH2E && !flag_finite_math_only) \
- target_flags |= MASK_IEEE; \
- sh_cpu = CPU_SH1; \
- assembler_dialect = 0; \
- if (TARGET_SH2) \
- sh_cpu = CPU_SH2; \
- if (TARGET_SH2E) \
- sh_cpu = CPU_SH2E; \
- if (TARGET_SH2A) \
- { \
- sh_cpu = CPU_SH2A; \
- if (TARGET_SH2A_DOUBLE) \
- target_flags |= MASK_FMOVD; \
- } \
- if (TARGET_SH3) \
- sh_cpu = CPU_SH3; \
- if (TARGET_SH3E) \
- sh_cpu = CPU_SH3E; \
- if (TARGET_SH4) \
- { \
- assembler_dialect = 1; \
- sh_cpu = CPU_SH4; \
- } \
- if (TARGET_SH4A_ARCH) \
- { \
- assembler_dialect = 1; \
- sh_cpu = CPU_SH4A; \
- } \
- if (TARGET_SH5) \
- { \
- sh_cpu = CPU_SH5; \
- target_flags |= MASK_ALIGN_DOUBLE; \
- if (TARGET_SHMEDIA_FPU) \
- target_flags |= MASK_FMOVD; \
- if (TARGET_SHMEDIA) \
- { \
- /* There are no delay slots on SHmedia. */ \
- flag_delayed_branch = 0; \
- /* Relaxation isn't yet supported for SHmedia */ \
- target_flags &= ~MASK_RELAX; \
- /* After reload, if conversion does little good but can cause \
- ICEs: \
- - find_if_block doesn't do anything for SH because we don't\
- have conditional execution patterns. (We use conditional\
- move patterns, which are handled differently, and only \
- before reload). \
- - find_cond_trap doesn't do anything for the SH because we \
- don't have conditional traps. \
- - find_if_case_1 uses redirect_edge_and_branch_force in \
- the only path that does an optimization, and this causes \
- an ICE when branch targets are in registers. \
- - find_if_case_2 doesn't do anything for the SHmedia after \
- reload except when it can redirect a tablejump - and \
- that's rather rare. */ \
- flag_if_conversion2 = 0; \
- if (! strcmp (sh_div_str, "call")) \
- sh_div_strategy = SH_DIV_CALL; \
- else if (! strcmp (sh_div_str, "call2")) \
- sh_div_strategy = SH_DIV_CALL2; \
- if (! strcmp (sh_div_str, "fp") && TARGET_FPU_ANY) \
- sh_div_strategy = SH_DIV_FP; \
- else if (! strcmp (sh_div_str, "inv")) \
- sh_div_strategy = SH_DIV_INV; \
- else if (! strcmp (sh_div_str, "inv:minlat")) \
- sh_div_strategy = SH_DIV_INV_MINLAT; \
- else if (! strcmp (sh_div_str, "inv20u")) \
- sh_div_strategy = SH_DIV_INV20U; \
- else if (! strcmp (sh_div_str, "inv20l")) \
- sh_div_strategy = SH_DIV_INV20L; \
- else if (! strcmp (sh_div_str, "inv:call2")) \
- sh_div_strategy = SH_DIV_INV_CALL2; \
- else if (! strcmp (sh_div_str, "inv:call")) \
- sh_div_strategy = SH_DIV_INV_CALL; \
- else if (! strcmp (sh_div_str, "inv:fp")) \
- { \
- if (TARGET_FPU_ANY) \
- sh_div_strategy = SH_DIV_INV_FP; \
- else \
- sh_div_strategy = SH_DIV_INV; \
- } \
- } \
- /* -fprofile-arcs needs a working libgcov . In unified tree \
- configurations with newlib, this requires to configure with \
- --with-newlib --with-headers. But there is no way to check \
- here we have a working libgcov, so just assume that we have. */\
- if (profile_flag) \
- warning (0, "profiling is still experimental for this target");\
- } \
- else \
- { \
- /* Only the sh64-elf assembler fully supports .quad properly. */\
- targetm.asm_out.aligned_op.di = NULL; \
- targetm.asm_out.unaligned_op.di = NULL; \
- } \
- if (TARGET_SH1) \
- { \
- if (! strcmp (sh_div_str, "call-div1")) \
- sh_div_strategy = SH_DIV_CALL_DIV1; \
- else if (! strcmp (sh_div_str, "call-fp") \
- && (TARGET_FPU_DOUBLE \
- || (TARGET_HARD_SH4 && TARGET_SH2E) \
- || (TARGET_SHCOMPACT && TARGET_FPU_ANY))) \
- sh_div_strategy = SH_DIV_CALL_FP; \
- else if (! strcmp (sh_div_str, "call-table") && TARGET_SH2) \
- sh_div_strategy = SH_DIV_CALL_TABLE; \
- else \
- /* Pick one that makes most sense for the target in general. \
- It is not much good to use different functions depending \
- on -Os, since then we'll end up with two different functions \
- when some of the code is compiled for size, and some for \
- speed. */ \
- \
- /* SH4 tends to emphasize speed. */ \
- if (TARGET_HARD_SH4) \
- sh_div_strategy = SH_DIV_CALL_TABLE; \
- /* These have their own way of doing things. */ \
- else if (TARGET_SH2A) \
- sh_div_strategy = SH_DIV_INTRINSIC; \
- /* ??? Should we use the integer SHmedia function instead? */ \
- else if (TARGET_SHCOMPACT && TARGET_FPU_ANY) \
- sh_div_strategy = SH_DIV_CALL_FP; \
- /* SH1 .. SH3 cores often go into small-footprint systems, so \
- default to the smallest implementation available. */ \
- else if (TARGET_SH2) /* ??? EXPERIMENTAL */ \
- sh_div_strategy = SH_DIV_CALL_TABLE; \
- else \
- sh_div_strategy = SH_DIV_CALL_DIV1; \
- } \
- if (!TARGET_SH1) \
- TARGET_PRETEND_CMOVE = 0; \
- if (sh_divsi3_libfunc[0]) \
- ; /* User supplied - leave it alone. */ \
- else if (TARGET_DIVIDE_CALL_FP) \
- sh_divsi3_libfunc = "__sdivsi3_i4"; \
- else if (TARGET_DIVIDE_CALL_TABLE) \
- sh_divsi3_libfunc = "__sdivsi3_i4i"; \
- else if (TARGET_SH5) \
- sh_divsi3_libfunc = "__sdivsi3_1"; \
- else \
- sh_divsi3_libfunc = "__sdivsi3"; \
- if (TARGET_FMOVD) \
- reg_class_from_letter['e' - 'a'] = NO_REGS; \
- \
- for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
- if (! VALID_REGISTER_P (regno)) \
- sh_register_names[regno][0] = '\0'; \
- \
- for (regno = 0; regno < ADDREGNAMES_SIZE; regno++) \
- if (! VALID_REGISTER_P (ADDREGNAMES_REGNO (regno))) \
- sh_additional_register_names[regno][0] = '\0'; \
- \
- if (flag_omit_frame_pointer < 0) \
- { \
- /* The debugging information is sufficient, \
- but gdb doesn't implement this yet */ \
- if (0) \
- flag_omit_frame_pointer \
- = (PREFERRED_DEBUGGING_TYPE == DWARF2_DEBUG); \
- else \
- flag_omit_frame_pointer = 0; \
- } \
- \
- if ((flag_pic && ! TARGET_PREFERGOT) \
- || (TARGET_SHMEDIA && !TARGET_PT_FIXED)) \
- flag_no_function_cse = 1; \
- \
- if (SMALL_REGISTER_CLASSES) \
- { \
- /* Never run scheduling before reload, since that can \
- break global alloc, and generates slower code anyway due \
- to the pressure on R0. */ \
- /* Enable sched1 for SH4; ready queue will be reordered by \
- the target hooks when pressure is high. We can not do this for \
- SH3 and lower as they give spill failures for R0. */ \
- if (!TARGET_HARD_SH4) \
- flag_schedule_insns = 0; \
- /* ??? Current exception handling places basic block boundaries \
- after call_insns. It causes the high pressure on R0 and gives \
- spill failures for R0 in reload. See PR 22553 and the thread \
- on gcc-patches \
- <http://gcc.gnu.org/ml/gcc-patches/2005-10/msg00816.html>. */ \
- else if (flag_exceptions) \
- { \
- if (flag_schedule_insns == 1) \
- warning (0, "ignoring -fschedule-insns because of exception handling bug"); \
- flag_schedule_insns = 0; \
- } \
- } \
- \
- if (align_loops == 0) \
- align_loops = 1 << (TARGET_SH5 ? 3 : 2); \
- if (align_jumps == 0) \
- align_jumps = 1 << CACHE_LOG; \
- else if (align_jumps < (TARGET_SHMEDIA ? 4 : 2)) \
- align_jumps = TARGET_SHMEDIA ? 4 : 2; \
- \
- /* Allocation boundary (in *bytes*) for the code of a function. \
- SH1: 32 bit alignment is faster, because instructions are always \
- fetched as a pair from a longword boundary. \
- SH2 .. SH5 : align to cache line start. */ \
- if (align_functions == 0) \
- align_functions \
- = TARGET_SMALLCODE ? FUNCTION_BOUNDARY/8 : (1 << CACHE_LOG); \
- /* The linker relaxation code breaks when a function contains \
- alignments that are larger than that at the start of a \
- compilation unit. */ \
- if (TARGET_RELAX) \
- { \
- int min_align \
- = align_loops > align_jumps ? align_loops : align_jumps; \
- \
- /* Also take possible .long constants / mova tables int account. */\
- if (min_align < 4) \
- min_align = 4; \
- if (align_functions < min_align) \
- align_functions = min_align; \
- } \
-} while (0)
+#define OVERRIDE_OPTIONS sh_override_options ()
/* Target machine storage layout. */

57
lang/gcc/4.2/patches/patch-gcc_config_sh_sh_md Normal file
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@ -0,0 +1,57 @@
$OpenBSD: patch-gcc_config_sh_sh_md,v 1.1 2013/02/04 21:23:40 tobiasu Exp $
--- gcc/config/sh/sh.md.orig Tue Jan 29 02:05:10 2013
+++ gcc/config/sh/sh.md Tue Jan 29 02:07:11 2013
@@ -1774,28 +1774,8 @@
operands[3] = gen_reg_rtx (Pmode);
/* Emit the move of the address to a pseudo outside of the libcall. */
- if (TARGET_DIVIDE_CALL_TABLE)
+ if (TARGET_HARD_SH4 && TARGET_SH2E)
{
- /* libgcc2:__udivmoddi4 is not supposed to use an actual division, since
- that causes problems when the divide code is supposed to come from a
- separate library. Division by zero is undefined, so dividing 1 can be
- implemented by comparing with the divisor. */
- if (operands[1] == const1_rtx && currently_expanding_to_rtl)
- {
- emit_insn (gen_cmpsi (operands[1], operands[2]));
- emit_insn (gen_sgeu (operands[0]));
- DONE;
- }
- else if (operands[2] == const0_rtx)
- {
- emit_move_insn (operands[0], operands[2]);
- DONE;
- }
- function_symbol (operands[3], \"__udivsi3_i4i\", SFUNC_GOT);
- last = gen_udivsi3_i4_int (operands[0], operands[3]);
- }
- else if (TARGET_DIVIDE_CALL_FP)
- {
function_symbol (operands[3], \"__udivsi3_i4\", SFUNC_STATIC);
if (TARGET_FPU_SINGLE)
last = gen_udivsi3_i4_single (operands[0], operands[3]);
@@ -2046,13 +2026,8 @@
operands[3] = gen_reg_rtx (Pmode);
/* Emit the move of the address to a pseudo outside of the libcall. */
- if (TARGET_DIVIDE_CALL_TABLE)
+ if (TARGET_HARD_SH4 && TARGET_SH2E)
{
- function_symbol (operands[3], sh_divsi3_libfunc, SFUNC_GOT);
- last = gen_divsi3_i4_int (operands[0], operands[3]);
- }
- else if (TARGET_DIVIDE_CALL_FP)
- {
function_symbol (operands[3], sh_divsi3_libfunc, SFUNC_STATIC);
if (TARGET_FPU_SINGLE)
last = gen_divsi3_i4_single (operands[0], operands[3]);
@@ -8354,7 +8329,7 @@ label:
&& GET_CODE (XEXP (operands[1], 0)) == UNSPEC
&& GET_CODE (XVECEXP (XEXP (operands[1], 0), 0, 0)) == SYMBOL_REF
&& strcmp (XSTR (XVECEXP (XEXP (operands[1], 0), 0, 0), 0),
- \"__stack_chk_guard\") == 0)
+ \"__guard_local\") == 0)
emit_insn (gen_blockage ());
/* N.B. This is not constant for a GOTPLT relocation. */

12
lang/gcc/4.2/patches/patch-gcc_config_sh_sh_opt Normal file
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@ -0,0 +1,12 @@
$OpenBSD: patch-gcc_config_sh_sh_opt,v 1.1 2013/02/04 21:23:40 tobiasu Exp $
--- gcc/config/sh/sh.opt.orig Tue Jan 29 01:58:08 2013
+++ gcc/config/sh/sh.opt Tue Jan 29 01:59:32 2013
@@ -191,7 +191,7 @@ Align doubles at 64-bit boundaries
mdiv=
Target RejectNegative Joined Var(sh_div_str) Init("")
-Division strategy, one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call, inv:call2, inv:fp call-div1 call-fp call-table
+Division strategy, one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l, inv:call, inv:call2, inv:fp
mdivsi3_libfunc=
Target RejectNegative Joined Var(sh_divsi3_libfunc) Init("")

12
lang/gcc/4.2/patches/patch-gcc_config_sh_t-sh Normal file
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@ -0,0 +1,12 @@
$OpenBSD: patch-gcc_config_sh_t-sh,v 1.1 2013/02/04 21:23:40 tobiasu Exp $
--- gcc/config/sh/t-sh.orig Tue Jan 29 01:53:23 2013
+++ gcc/config/sh/t-sh Tue Jan 29 01:53:38 2013
@@ -5,7 +5,7 @@ sh-c.o: $(srcdir)/config/sh/sh-c.c \
LIB1ASMSRC = sh/lib1funcs.asm
LIB1ASMFUNCS = _ashiftrt _ashiftrt_n _ashiftlt _lshiftrt _movmem \
_movmem_i4 _mulsi3 _sdivsi3 _sdivsi3_i4 _udivsi3 _udivsi3_i4 _set_fpscr \
- _div_table _udiv_qrnnd_16 \
+ _udiv_qrnnd_16 \
$(LIB1ASMFUNCS_CACHE)
# We want fine grained libraries, so use the new code to build the