Back-port fixes for rk3328 TPL memory training errors. okay jsg@

This commit is contained in:
kurt 2020-02-05 17:54:03 +00:00
parent 8704b322ce
commit 56fa0e11ae
4 changed files with 315 additions and 2 deletions

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@ -1,4 +1,4 @@
# $OpenBSD: Makefile,v 1.64 2020/01/17 14:24:42 kurt Exp $
# $OpenBSD: Makefile,v 1.65 2020/02/05 17:54:03 kurt Exp $
BROKEN-sparc64= Error: the specified option is not accepted in ISB at operand 1 -- isb sy
@ -7,7 +7,7 @@ FLAVOR?= arm
COMMENT= U-Boot firmware
VERSION= 2020.01
REVISION= 1
REVISION= 2
DISTNAME= u-boot-${VERSION}
PKGNAME= u-boot-${FLAVOR}-${VERSION:S/-//}
FULLPKGNAME= ${PKGNAME}

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@ -0,0 +1,225 @@
$OpenBSD: patch-arch_arm_dts_rk3328-sdram-ddr4-666_dtsi,v 1.1 2020/02/05 17:54:03 kurt Exp $
[PATCH 2/3] ram: rk3328: add support ddr4 init
https://github.com/u-boot/u-boot/commit/c7df6483c2484073c6953885886c4aa8aad84890
Index: arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
--- arch/arm/dts/rk3328-sdram-ddr4-666.dtsi.orig
+++ arch/arm/dts/rk3328-sdram-ddr4-666.dtsi
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+
+&dmc {
+ rockchip,sdram-params = <
+ 0x1
+ 0xA
+ 0x2
+ 0x1
+ 0x0
+ 0x0
+ 0x11
+ 0x0
+ 0x11
+ 0x0
+ 0
+
+ 0x94291288
+ 0x00000000
+ 0x00000027
+ 0x00000462
+ 0x00000015
+ 0x00000242
+ 0x000000ff
+
+ 333
+ 0
+ 1
+ 0
+ 0
+
+ 0x00000000
+ 0x43049010
+ 0x00000064
+ 0x0028003b
+ 0x000000d0
+ 0x00020053
+ 0x000000d4
+ 0x00220000
+ 0x000000d8
+ 0x00000100
+ 0x000000dc
+ 0x00040000
+ 0x000000e0
+ 0x00000000
+ 0x000000e4
+ 0x00110000
+ 0x000000e8
+ 0x00000420
+ 0x000000ec
+ 0x00000400
+ 0x000000f4
+ 0x000f011f
+ 0x00000100
+ 0x09060b06
+ 0x00000104
+ 0x00020209
+ 0x00000108
+ 0x0505040a
+ 0x0000010c
+ 0x0040400c
+ 0x00000110
+ 0x05030206
+ 0x00000114
+ 0x03030202
+ 0x00000120
+ 0x03030b03
+ 0x00000124
+ 0x00020208
+ 0x00000180
+ 0x01000040
+ 0x00000184
+ 0x00000000
+ 0x00000190
+ 0x07030003
+ 0x00000198
+ 0x05001100
+ 0x000001a0
+ 0xc0400003
+ 0x00000240
+ 0x06000604
+ 0x00000244
+ 0x00000201
+ 0x00000250
+ 0x00000f00
+ 0x00000490
+ 0x00000001
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+ 0xffffffff
+
+ 0x00000004
+ 0x0000000c
+ 0x00000028
+ 0x0000000a
+ 0x0000002c
+ 0x00000000
+ 0x00000030
+ 0x00000009
+ 0xffffffff
+ 0xffffffff
+
+ 0x77
+ 0x88
+ 0x79
+ 0x79
+ 0x87
+ 0x97
+ 0x87
+ 0x78
+ 0x77
+ 0x78
+ 0x87
+ 0x88
+ 0x87
+ 0x87
+ 0x77
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x79
+ 0x9
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x79
+ 0x9
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x78
+ 0x77
+ 0x79
+ 0x9
+
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x78
+ 0x69
+ 0x9
+
+ 0x77
+ 0x78
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x77
+ 0x79
+ 0x9
+ >;
+};

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@ -0,0 +1,44 @@
$OpenBSD: patch-arch_arm_dts_rk3328-sdram-lpddr3-666_dtsi,v 1.1 2020/02/05 17:54:03 kurt Exp $
[PATCH 3/3] ram: rk3328: update lpddr3 setting
https://github.com/u-boot/u-boot/commit/4082a6814235d81a21a1bfe9bfa8ca99c69d8fa8
Index: arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
--- arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi.orig
+++ arch/arm/dts/rk3328-sdram-lpddr3-666.dtsi
@@ -18,7 +18,7 @@
0x10
0
- 0x0c48a18a
+ 0x8c48a18a
0x00000000
0x00000021
0x00000482
@@ -33,7 +33,7 @@
0
0x00000000
- 0xc3040008
+ 0x43041008
0x00000064
0x00140023
0x000000d0
@@ -48,6 +48,8 @@
0x00010000
0x000000e4
0x00070003
+ 0x000000f4
+ 0x000f011f
0x00000100
0x06090b07
0x00000104
@@ -84,8 +86,6 @@
0x00000f00
0x00000490
0x00000001
- 0xffffffff
- 0xffffffff
0xffffffff
0xffffffff
0xffffffff

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@ -0,0 +1,44 @@
$OpenBSD: patch-drivers_ram_rockchip_sdram_rk3328_c,v 1.3 2020/02/05 17:54:03 kurt Exp $
[PATCH 1/3] ram: rk3328: only do data traning for cs0
https://github.com/u-boot/u-boot/commit/31531f6fdb22ab0e938f465e799d8191733981ae
Index: drivers/ram/rockchip/sdram_rk3328.c
--- drivers/ram/rockchip/sdram_rk3328.c.orig
+++ drivers/ram/rockchip/sdram_rk3328.c
@@ -377,16 +377,12 @@ static int sdram_init(struct dram_info *dram,
printf("data training error\n");
return -1;
}
- if (data_training(dram, 1, sdram_params->base.dramtype) != 0) {
- printf("data training error\n");
- return -1;
- }
if (sdram_params->base.dramtype == DDR4)
pctl_write_vrefdq(dram->pctl, 0x3, 5670,
sdram_params->base.dramtype);
- if (pre_init == 0) {
+ if (pre_init != 0) {
rx_deskew_switch_adjust(dram);
tx_deskew_switch_adjust(dram);
}
@@ -482,7 +478,7 @@ static int sdram_init_detect(struct dram_info *dram,
memcpy(&sdram_ch, &sdram_params->ch,
sizeof(struct rk3328_sdram_channel));
- sdram_init(dram, sdram_params, 1);
+ sdram_init(dram, sdram_params, 0);
dram_detect_cap(dram, sdram_params, 0);
/* modify bw, cs related timing */
@@ -495,7 +491,7 @@ static int sdram_init_detect(struct dram_info *dram,
sdram_ch.noc_timings.ddrtiming.b.bwratio = 1;
/* reinit sdram by real dram cap */
- sdram_init(dram, sdram_params, 0);
+ sdram_init(dram, sdram_params, 1);
/* redetect cs1 row */
sdram_detect_cs1_row(cap_info, sdram_params->base.dramtype);