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fix after transition to elf, conversion by miod@ and me.

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okay naddy@, miod@
(no bump, doesn't affect anything besides vax, on which it didn't even
compile after the breakage).
This commit is contained in:
espie 2013-07-22 16:54:56 +00:00
parent 103afb9d45
commit 338775dc12
7 changed files with 735 additions and 0 deletions
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63
devel/gmp/patches/patch-mpn_vax_add_n_s Normal file
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$OpenBSD: patch-mpn_vax_add_n_s,v 1.1 2013/07/22 16:54:56 espie Exp $
--- mpn/vax/add_n.s.orig Sun May 8 03:49:29 2011
+++ mpn/vax/add_n.s Mon Jul 22 02:58:33 2013
@@ -27,33 +27,33 @@
.text
.align 1
-.globl ___gmpn_add_n
-___gmpn_add_n:
+.globl __gmpn_add_n
+__gmpn_add_n:
.word 0x0
- movl 16(ap),r0
- movl 12(ap),r1
- movl 8(ap),r2
- movl 4(ap),r3
- mnegl r0,r5
- addl2 $3,r0
- ashl $-2,r0,r0 # unroll loop count
- bicl2 $-4,r5 # mask out low 2 bits
- movaq (r5)[r5],r5 # 9x
- jmp Loop(r5)
+ movl 16(%ap),%r0
+ movl 12(%ap),%r1
+ movl 8(%ap),%r2
+ movl 4(%ap),%r3
+ mnegl %r0,%r5
+ addl2 $3,%r0
+ ashl $-2,%r0,%r0 # unroll loop count
+ bicl2 $-4,%r5 # mask out low 2 bits
+ movaq (%r5)[%r5],%r5 # 9x
+ jmp Loop(%r5)
-Loop: movl (r2)+,r4
- adwc (r1)+,r4
- movl r4,(r3)+
- movl (r2)+,r4
- adwc (r1)+,r4
- movl r4,(r3)+
- movl (r2)+,r4
- adwc (r1)+,r4
- movl r4,(r3)+
- movl (r2)+,r4
- adwc (r1)+,r4
- movl r4,(r3)+
- sobgtr r0,Loop
+Loop: movl (%r2)+,%r4
+ adwc (%r1)+,%r4
+ movl %r4,(%r3)+
+ movl (%r2)+,%r4
+ adwc (%r1)+,%r4
+ movl %r4,(%r3)+
+ movl (%r2)+,%r4
+ adwc (%r1)+,%r4
+ movl %r4,(%r3)+
+ movl (%r2)+,%r4
+ adwc (%r1)+,%r4
+ movl %r4,(%r3)+
+ sobgtr %r0,Loop
- adwc r0,r0
+ adwc %r0,%r0
ret

172
devel/gmp/patches/patch-mpn_vax_addmul_1_s Normal file
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$OpenBSD: patch-mpn_vax_addmul_1_s,v 1.1 2013/07/22 16:54:56 espie Exp $
--- mpn/vax/addmul_1.s.orig Sun May 8 03:49:29 2011
+++ mpn/vax/addmul_1.s Mon Jul 22 02:58:50 2013
@@ -27,98 +27,98 @@
.text
.align 1
-.globl ___gmpn_addmul_1
-___gmpn_addmul_1:
+.globl __gmpn_addmul_1
+__gmpn_addmul_1:
.word 0xfc0
- movl 12(ap),r4
- movl 8(ap),r8
- movl 4(ap),r9
- movl 16(ap),r6
+ movl 12(%ap),%r4
+ movl 8(%ap),%r8
+ movl 4(%ap),%r9
+ movl 16(%ap),%r6
jlss s2_big
- clrl r3
- incl r4
- ashl $-1,r4,r7
- jlbc r4,L1
- clrl r11
+ clrl %r3
+ incl %r4
+ ashl $-1,%r4,%r7
+ jlbc %r4,L1
+ clrl %r11
# Loop for S2_LIMB < 0x80000000
-Loop1: movl (r8)+,r1
+Loop1: movl (%r8)+,%r1
jlss L1n0
- emul r1,r6,$0,r2
- addl2 r11,r2
- adwc $0,r3
- addl2 r2,(r9)+
- adwc $0,r3
-L1: movl (r8)+,r1
+ emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc $0,%r3
+ addl2 %r2,(%r9)+
+ adwc $0,%r3
+L1: movl (%r8)+,%r1
jlss L1n1
-L1p1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc $0,r11
- addl2 r10,(r9)+
- adwc $0,r11
+L1p1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc $0,%r11
+ addl2 %r10,(%r9)+
+ adwc $0,%r11
- sobgtr r7,Loop1
- movl r11,r0
+ sobgtr %r7,Loop1
+ movl %r11,%r0
ret
-L1n0: emul r1,r6,$0,r2
- addl2 r11,r2
- adwc r6,r3
- addl2 r2,(r9)+
- adwc $0,r3
- movl (r8)+,r1
+L1n0: emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc %r6,%r3
+ addl2 %r2,(%r9)+
+ adwc $0,%r3
+ movl (%r8)+,%r1
jgeq L1p1
-L1n1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc r6,r11
- addl2 r10,(r9)+
- adwc $0,r11
+L1n1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc %r6,%r11
+ addl2 %r10,(%r9)+
+ adwc $0,%r11
- sobgtr r7,Loop1
- movl r11,r0
+ sobgtr %r7,Loop1
+ movl %r11,%r0
ret
-s2_big: clrl r3
- incl r4
- ashl $-1,r4,r7
- jlbc r4,L2
- clrl r11
+s2_big: clrl %r3
+ incl %r4
+ ashl $-1,%r4,%r7
+ jlbc %r4,L2
+ clrl %r11
# Loop for S2_LIMB >= 0x80000000
-Loop2: movl (r8)+,r1
+Loop2: movl (%r8)+,%r1
jlss L2n0
- emul r1,r6,$0,r2
- addl2 r11,r2
- adwc r1,r3
- addl2 r2,(r9)+
- adwc $0,r3
-L2: movl (r8)+,r1
+ emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc %r1,%r3
+ addl2 %r2,(%r9)+
+ adwc $0,%r3
+L2: movl (%r8)+,%r1
jlss L2n1
-L2p1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc r1,r11
- addl2 r10,(r9)+
- adwc $0,r11
+L2p1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc %r1,%r11
+ addl2 %r10,(%r9)+
+ adwc $0,%r11
- sobgtr r7,Loop2
- movl r11,r0
+ sobgtr %r7,Loop2
+ movl %r11,%r0
ret
-L2n0: emul r1,r6,$0,r2
- addl2 r11,r2
- adwc r6,r3
- addl2 r2,(r9)+
- adwc r1,r3
- movl (r8)+,r1
+L2n0: emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc %r6,%r3
+ addl2 %r2,(%r9)+
+ adwc %r1,%r3
+ movl (%r8)+,%r1
jgeq L2p1
-L2n1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc r6,r11
- addl2 r10,(r9)+
- adwc r1,r11
+L2n1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc %r6,%r11
+ addl2 %r10,(%r9)+
+ adwc %r1,%r11
- sobgtr r7,Loop2
- movl r11,r0
+ sobgtr %r7,Loop2
+ movl %r11,%r0
ret

53
devel/gmp/patches/patch-mpn_vax_lshift_s Normal file
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@ -0,0 +1,53 @@
$OpenBSD: patch-mpn_vax_lshift_s,v 1.1 2013/07/22 16:54:56 espie Exp $
--- mpn/vax/lshift.s.orig Sun May 8 03:49:29 2011
+++ mpn/vax/lshift.s Mon Jul 22 02:58:58 2013
@@ -28,29 +28,29 @@
.text
.align 1
-.globl ___gmpn_lshift
-___gmpn_lshift:
+.globl __gmpn_lshift
+__gmpn_lshift:
.word 0x1c0
- movl 4(ap),r7
- movl 8(ap),r6
- movl 12(ap),r1
- movl 16(ap),r8
+ movl 4(%ap),%r7
+ movl 8(%ap),%r6
+ movl 12(%ap),%r1
+ movl 16(%ap),%r8
- moval (r6)[r1],r6
- moval (r7)[r1],r7
- clrl r3
- movl -(r6),r2
- ashq r8,r2,r4
- movl r5,r0
- movl r2,r3
- decl r1
+ moval (%r6)[%r1],%r6
+ moval (%r7)[%r1],%r7
+ clrl %r3
+ movl -(%r6),%r2
+ ashq %r8,%r2,%r4
+ movl %r5,%r0
+ movl %r2,%r3
+ decl %r1
jeql Lend
-Loop: movl -(r6),r2
- ashq r8,r2,r4
- movl r5,-(r7)
- movl r2,r3
- sobgtr r1,Loop
+Loop: movl -(%r6),%r2
+ ashq %r8,%r2,%r4
+ movl %r5,-(%r7)
+ movl %r2,%r3
+ sobgtr %r1,Loop
-Lend: movl r4,-4(r7)
+Lend: movl %r4,-4(%r7)
ret

163
devel/gmp/patches/patch-mpn_vax_mul_1_s Normal file
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@ -0,0 +1,163 @@
$OpenBSD: patch-mpn_vax_mul_1_s,v 1.1 2013/07/22 16:54:56 espie Exp $
--- mpn/vax/mul_1.s.orig Sun May 8 03:49:29 2011
+++ mpn/vax/mul_1.s Mon Jul 22 02:59:13 2013
@@ -27,95 +27,95 @@
.text
.align 1
-.globl ___gmpn_mul_1
-___gmpn_mul_1:
+.globl __gmpn_mul_1
+__gmpn_mul_1:
.word 0xfc0
- movl 12(ap),r4
- movl 8(ap),r8
- movl 4(ap),r9
- movl 16(ap),r6
+ movl 12(%ap),%r4
+ movl 8(%ap),%r8
+ movl 4(%ap),%r9
+ movl 16(%ap),%r6
jlss s2_big
# One might want to combine the addl2 and the store below, but that
# is actually just slower according to my timing tests. (VAX 3600)
- clrl r3
- incl r4
- ashl $-1,r4,r7
- jlbc r4,L1
- clrl r11
+ clrl %r3
+ incl %r4
+ ashl $-1,%r4,%r7
+ jlbc %r4,L1
+ clrl %r11
# Loop for S2_LIMB < 0x80000000
-Loop1: movl (r8)+,r1
+Loop1: movl (%r8)+,%r1
jlss L1n0
- emul r1,r6,$0,r2
- addl2 r11,r2
- adwc $0,r3
- movl r2,(r9)+
-L1: movl (r8)+,r1
+ emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc $0,%r3
+ movl %r2,(%r9)+
+L1: movl (%r8)+,%r1
jlss L1n1
-L1p1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc $0,r11
- movl r10,(r9)+
+L1p1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc $0,%r11
+ movl %r10,(%r9)+
- sobgtr r7,Loop1
- movl r11,r0
+ sobgtr %r7,Loop1
+ movl %r11,%r0
ret
-L1n0: emul r1,r6,$0,r2
- addl2 r11,r2
- adwc r6,r3
- movl r2,(r9)+
- movl (r8)+,r1
+L1n0: emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc %r6,%r3
+ movl %r2,(%r9)+
+ movl (%r8)+,%r1
jgeq L1p1
-L1n1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc r6,r11
- movl r10,(r9)+
+L1n1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc %r6,%r11
+ movl %r10,(%r9)+
- sobgtr r7,Loop1
- movl r11,r0
+ sobgtr %r7,Loop1
+ movl %r11,%r0
ret
-s2_big: clrl r3
- incl r4
- ashl $-1,r4,r7
- jlbc r4,L2
- clrl r11
+s2_big: clrl %r3
+ incl %r4
+ ashl $-1,%r4,%r7
+ jlbc %r4,L2
+ clrl %r11
# Loop for S2_LIMB >= 0x80000000
-Loop2: movl (r8)+,r1
+Loop2: movl (%r8)+,%r1
jlss L2n0
- emul r1,r6,$0,r2
- addl2 r11,r2
- adwc r1,r3
- movl r2,(r9)+
-L2: movl (r8)+,r1
+ emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc %r1,%r3
+ movl %r2,(%r9)+
+L2: movl (%r8)+,%r1
jlss L2n1
-L2p1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc r1,r11
- movl r10,(r9)+
+L2p1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc %r1,%r11
+ movl %r10,(%r9)+
- sobgtr r7,Loop2
- movl r11,r0
+ sobgtr %r7,Loop2
+ movl %r11,%r0
ret
-L2n0: emul r1,r6,$0,r2
- addl2 r1,r3
- addl2 r11,r2
- adwc r6,r3
- movl r2,(r9)+
- movl (r8)+,r1
+L2n0: emul %r1,%r6,$0,%r2
+ addl2 %r1,%r3
+ addl2 %r11,%r2
+ adwc %r6,%r3
+ movl %r2,(%r9)+
+ movl (%r8)+,%r1
jgeq L2p1
-L2n1: emul r1,r6,$0,r10
- addl2 r1,r11
- addl2 r3,r10
- adwc r6,r11
- movl r10,(r9)+
+L2n1: emul %r1,%r6,$0,%r10
+ addl2 %r1,%r11
+ addl2 %r3,%r10
+ adwc %r6,%r11
+ movl %r10,(%r9)+
- sobgtr r7,Loop2
- movl r11,r0
+ sobgtr %r7,Loop2
+ movl %r11,%r0
ret

49
devel/gmp/patches/patch-mpn_vax_rshift_s Normal file
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@ -0,0 +1,49 @@
$OpenBSD: patch-mpn_vax_rshift_s,v 1.1 2013/07/22 16:54:56 espie Exp $
--- mpn/vax/rshift.s.orig Sun May 8 03:49:29 2011
+++ mpn/vax/rshift.s Mon Jul 22 02:59:21 2013
@@ -28,27 +28,27 @@
.text
.align 1
-.globl ___gmpn_rshift
-___gmpn_rshift:
+.globl __gmpn_rshift
+__gmpn_rshift:
.word 0x1c0
- movl 4(ap),r7
- movl 8(ap),r6
- movl 12(ap),r1
- movl 16(ap),r8
+ movl 4(%ap),%r7
+ movl 8(%ap),%r6
+ movl 12(%ap),%r1
+ movl 16(%ap),%r8
- movl (r6)+,r2
- subl3 r8,$32,r8
- ashl r8,r2,r0
- decl r1
+ movl (%r6)+,%r2
+ subl3 %r8,$32,%r8
+ ashl %r8,%r2,%r0
+ decl %r1
jeql Lend
-Loop: movl (r6)+,r3
- ashq r8,r2,r4
- movl r5,(r7)+
- movl r3,r2
- sobgtr r1,Loop
+Loop: movl (%r6)+,%r3
+ ashq %r8,%r2,%r4
+ movl %r5,(%r7)+
+ movl %r3,%r2
+ sobgtr %r1,Loop
-Lend: clrl r3
- ashq r8,r2,r4
- movl r5,(r7)
+Lend: clrl %r3
+ ashq %r8,%r2,%r4
+ movl %r5,(%r7)
ret

63
devel/gmp/patches/patch-mpn_vax_sub_n_s Normal file
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@ -0,0 +1,63 @@
$OpenBSD: patch-mpn_vax_sub_n_s,v 1.1 2013/07/22 16:54:56 espie Exp $
--- mpn/vax/sub_n.s.orig Sun May 8 03:49:29 2011
+++ mpn/vax/sub_n.s Mon Jul 22 02:59:32 2013
@@ -27,33 +27,33 @@
.text
.align 1
-.globl ___gmpn_sub_n
-___gmpn_sub_n:
+.globl __gmpn_sub_n
+__gmpn_sub_n:
.word 0x0
- movl 16(ap),r0
- movl 12(ap),r1
- movl 8(ap),r2
- movl 4(ap),r3
- mnegl r0,r5
- addl2 $3,r0
- ashl $-2,r0,r0 # unroll loop count
- bicl2 $-4,r5 # mask out low 2 bits
- movaq (r5)[r5],r5 # 9x
- jmp Loop(r5)
+ movl 16(%ap),%r0
+ movl 12(%ap),%r1
+ movl 8(%ap),%r2
+ movl 4(%ap),%r3
+ mnegl %r0,%r5
+ addl2 $3,%r0
+ ashl $-2,%r0,%r0 # unroll loop count
+ bicl2 $-4,%r5 # mask out low 2 bits
+ movaq (%r5)[%r5],%r5 # 9x
+ jmp Loop(%r5)
-Loop: movl (r2)+,r4
- sbwc (r1)+,r4
- movl r4,(r3)+
- movl (r2)+,r4
- sbwc (r1)+,r4
- movl r4,(r3)+
- movl (r2)+,r4
- sbwc (r1)+,r4
- movl r4,(r3)+
- movl (r2)+,r4
- sbwc (r1)+,r4
- movl r4,(r3)+
- sobgtr r0,Loop
+Loop: movl (%r2)+,%r4
+ sbwc (%r1)+,%r4
+ movl %r4,(%r3)+
+ movl (%r2)+,%r4
+ sbwc (%r1)+,%r4
+ movl %r4,(%r3)+
+ movl (%r2)+,%r4
+ sbwc (%r1)+,%r4
+ movl %r4,(%r3)+
+ movl (%r2)+,%r4
+ sbwc (%r1)+,%r4
+ movl %r4,(%r3)+
+ sobgtr %r0,Loop
- adwc r0,r0
+ adwc %r0,%r0
ret

172
devel/gmp/patches/patch-mpn_vax_submul_1_s Normal file
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@ -0,0 +1,172 @@
$OpenBSD: patch-mpn_vax_submul_1_s,v 1.1 2013/07/22 16:54:56 espie Exp $
--- mpn/vax/submul_1.s.orig Sun May 8 03:49:29 2011
+++ mpn/vax/submul_1.s Mon Jul 22 02:59:44 2013
@@ -27,98 +27,98 @@
.text
.align 1
-.globl ___gmpn_submul_1
-___gmpn_submul_1:
+.globl __gmpn_submul_1
+__gmpn_submul_1:
.word 0xfc0
- movl 12(ap),r4
- movl 8(ap),r8
- movl 4(ap),r9
- movl 16(ap),r6
+ movl 12(%ap),%r4
+ movl 8(%ap),%r8
+ movl 4(%ap),%r9
+ movl 16(%ap),%r6
jlss s2_big
- clrl r3
- incl r4
- ashl $-1,r4,r7
- jlbc r4,L1
- clrl r11
+ clrl %r3
+ incl %r4
+ ashl $-1,%r4,%r7
+ jlbc %r4,L1
+ clrl %r11
# Loop for S2_LIMB < 0x80000000
-Loop1: movl (r8)+,r1
+Loop1: movl (%r8)+,%r1
jlss L1n0
- emul r1,r6,$0,r2
- addl2 r11,r2
- adwc $0,r3
- subl2 r2,(r9)+
- adwc $0,r3
-L1: movl (r8)+,r1
+ emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc $0,%r3
+ subl2 %r2,(%r9)+
+ adwc $0,%r3
+L1: movl (%r8)+,%r1
jlss L1n1
-L1p1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc $0,r11
- subl2 r10,(r9)+
- adwc $0,r11
+L1p1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc $0,%r11
+ subl2 %r10,(%r9)+
+ adwc $0,%r11
- sobgtr r7,Loop1
- movl r11,r0
+ sobgtr %r7,Loop1
+ movl %r11,%r0
ret
-L1n0: emul r1,r6,$0,r2
- addl2 r11,r2
- adwc r6,r3
- subl2 r2,(r9)+
- adwc $0,r3
- movl (r8)+,r1
+L1n0: emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc %r6,%r3
+ subl2 %r2,(%r9)+
+ adwc $0,%r3
+ movl (%r8)+,%r1
jgeq L1p1
-L1n1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc r6,r11
- subl2 r10,(r9)+
- adwc $0,r11
+L1n1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc %r6,%r11
+ subl2 %r10,(%r9)+
+ adwc $0,%r11
- sobgtr r7,Loop1
- movl r11,r0
+ sobgtr %r7,Loop1
+ movl %r11,%r0
ret
-s2_big: clrl r3
- incl r4
- ashl $-1,r4,r7
- jlbc r4,L2
- clrl r11
+s2_big: clrl %r3
+ incl %r4
+ ashl $-1,%r4,%r7
+ jlbc %r4,L2
+ clrl %r11
# Loop for S2_LIMB >= 0x80000000
-Loop2: movl (r8)+,r1
+Loop2: movl (%r8)+,%r1
jlss L2n0
- emul r1,r6,$0,r2
- addl2 r11,r2
- adwc r1,r3
- subl2 r2,(r9)+
- adwc $0,r3
-L2: movl (r8)+,r1
+ emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc %r1,%r3
+ subl2 %r2,(%r9)+
+ adwc $0,%r3
+L2: movl (%r8)+,%r1
jlss L2n1
-L2p1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc r1,r11
- subl2 r10,(r9)+
- adwc $0,r11
+L2p1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc %r1,%r11
+ subl2 %r10,(%r9)+
+ adwc $0,%r11
- sobgtr r7,Loop2
- movl r11,r0
+ sobgtr %r7,Loop2
+ movl %r11,%r0
ret
-L2n0: emul r1,r6,$0,r2
- addl2 r11,r2
- adwc r6,r3
- subl2 r2,(r9)+
- adwc r1,r3
- movl (r8)+,r1
+L2n0: emul %r1,%r6,$0,%r2
+ addl2 %r11,%r2
+ adwc %r6,%r3
+ subl2 %r2,(%r9)+
+ adwc %r1,%r3
+ movl (%r8)+,%r1
jgeq L2p1
-L2n1: emul r1,r6,$0,r10
- addl2 r3,r10
- adwc r6,r11
- subl2 r10,(r9)+
- adwc r1,r11
+L2n1: emul %r1,%r6,$0,%r10
+ addl2 %r3,%r10
+ adwc %r6,%r11
+ subl2 %r10,(%r9)+
+ adwc %r1,%r11
- sobgtr r7,Loop2
- movl r11,r0
+ sobgtr %r7,Loop2
+ movl %r11,%r0
ret