- Build option ROM .S files with separate preprocessor and

assembler steps because the C compiler could be unsuitable.
- When the pxa2xx performance counter related cp14 registers were converted
  from a switch-statement implementation to the new table driven cpregs
  format in commit dc2a9045c, the crn and crm values for all these
  registers were accidentally transposed. Fixes being able to boot
  OpenBSD/zaurus.

ok sthen@
This commit is contained in:
brad 2013-02-02 23:51:45 +00:00
parent 97a9d398c2
commit 08fadbcd6b
4 changed files with 102 additions and 5 deletions

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@ -1,10 +1,11 @@
# $OpenBSD: Makefile,v 1.98 2013/02/02 11:30:34 brad Exp $
# $OpenBSD: Makefile,v 1.99 2013/02/02 23:51:45 brad Exp $
ONLY_FOR_ARCHS= amd64 i386 powerpc sparc64
COMMENT= multi system emulator
DISTNAME= qemu-1.3.1
REVISION= 0
CATEGORIES= emulators
MASTER_SITES= http://wiki.qemu.org/download/
EXTRACT_SUFX= .tar.bz2

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@ -1,7 +1,20 @@
$OpenBSD: patch-configure,v 1.28 2013/02/02 11:30:34 brad Exp $
--- configure.orig Mon Dec 3 14:37:05 2012
+++ configure Mon Dec 3 15:59:33 2012
@@ -3066,10 +3066,6 @@ fi
$OpenBSD: patch-configure,v 1.29 2013/02/02 23:51:45 brad Exp $
Build option ROM .S files with separate preprocessor and
assembler steps because the C compiler could be unsuitable.
--- configure.orig Mon Jan 28 16:05:15 2013
+++ configure Sat Feb 2 12:46:09 2013
@@ -252,6 +252,8 @@ done
cc="${CC-${cross_prefix}gcc}"
ar="${AR-${cross_prefix}ar}"
+as="${AS-${cross_prefix}as}"
+cpp="${CPP-$cc -E}"
objcopy="${OBJCOPY-${cross_prefix}objcopy}"
ld="${LD-${cross_prefix}ld}"
libtool="${LIBTOOL-${cross_prefix}libtool}"
@@ -3066,10 +3068,6 @@ fi
# End of CC checks
# After here, no more $cc or $ld runs
@ -12,3 +25,24 @@ $OpenBSD: patch-configure,v 1.28 2013/02/02 11:30:34 brad Exp $
# Disable zero malloc errors for official releases unless explicitly told to
# enable/disable
if test -z "$zero_malloc" ; then
@@ -3652,6 +3650,8 @@ echo "CC_I386=$cc_i386" >> $config_host_mak
echo "HOST_CC=$host_cc" >> $config_host_mak
echo "OBJCC=$objcc" >> $config_host_mak
echo "AR=$ar" >> $config_host_mak
+echo "AS=$as" >> $config_host_mak
+echo "CPP=$cpp" >> $config_host_mak
echo "OBJCOPY=$objcopy" >> $config_host_mak
echo "LD=$ld" >> $config_host_mak
echo "WINDRES=$windres" >> $config_host_mak
@@ -4209,9 +4209,10 @@ for rom in seabios vgabios ; do
config_mak=roms/$rom/config.mak
echo "# Automatically generated by configure - do not modify" > $config_mak
echo "SRC_PATH=$source_path/roms/$rom" >> $config_mak
+ echo "AS=$as" >> $config_mak
echo "CC=$cc" >> $config_mak
echo "BCC=bcc" >> $config_mak
- echo "CPP=${cross_prefix}cpp" >> $config_mak
+ echo "CPP=$cpp" >> $config_mak
echo "OBJCOPY=objcopy" >> $config_mak
echo "IASL=iasl" >> $config_mak
echo "LD=$ld" >> $config_mak

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@ -0,0 +1,41 @@
$OpenBSD: patch-hw_pxa2xx_c,v 1.1 2013/02/02 23:51:45 brad Exp $
When the pxa2xx performance counter related cp14 registers were converted
from a switch-statement implementation to the new table driven cpregs
format in commit dc2a9045c, the crn and crm values for all these
registers were accidentally transposed.
--- hw/pxa2xx.c.orig Sat Feb 2 10:36:23 2013
+++ hw/pxa2xx.c Sat Feb 2 10:40:33 2013
@@ -343,23 +343,23 @@ static int pxa2xx_cpccnt_read(CPUARMState *env, const
}
static const ARMCPRegInfo pxa_cp_reginfo[] = {
- /* cp14 crn==1: perf registers */
- { .name = "CPPMNC", .cp = 14, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 0,
+ /* cp14 crm==1: perf registers */
+ { .name = "CPPMNC", .cp = 14, .crn = 0, .crm = 1, .opc1 = 0, .opc2 = 0,
.access = PL1_RW,
.readfn = pxa2xx_cppmnc_read, .writefn = pxa2xx_cppmnc_write },
{ .name = "CPCCNT", .cp = 14, .crn = 1, .crm = 1, .opc1 = 0, .opc2 = 0,
.access = PL1_RW,
.readfn = pxa2xx_cpccnt_read, .writefn = arm_cp_write_ignore },
- { .name = "CPINTEN", .cp = 14, .crn = 1, .crm = 4, .opc1 = 0, .opc2 = 0,
+ { .name = "CPINTEN", .cp = 14, .crn = 4, .crm = 1, .opc1 = 0, .opc2 = 0,
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
- { .name = "CPFLAG", .cp = 14, .crn = 1, .crm = 5, .opc1 = 0, .opc2 = 0,
+ { .name = "CPFLAG", .cp = 14, .crn = 5, .crm = 1, .opc1 = 0, .opc2 = 0,
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
- { .name = "CPEVTSEL", .cp = 14, .crn = 1, .crm = 8, .opc1 = 0, .opc2 = 0,
+ { .name = "CPEVTSEL", .cp = 14, .crn = 8, .crm = 1, .opc1 = 0, .opc2 = 0,
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
- /* cp14 crn==2: performance count registers */
- { .name = "CPPMN0", .cp = 14, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 0,
+ /* cp14 crm==2: performance count registers */
+ { .name = "CPPMN0", .cp = 14, .crn = 0, .crm = 2, .opc1 = 0, .opc2 = 0,
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
- { .name = "CPPMN1", .cp = 14, .crn = 2, .crm = 1, .opc1 = 0, .opc2 = 0,
+ { .name = "CPPMN1", .cp = 14, .crn = 1, .crm = 2, .opc1 = 0, .opc2 = 0,
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
{ .name = "CPPMN2", .cp = 14, .crn = 2, .crm = 2, .opc1 = 0, .opc2 = 0,
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },

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@ -0,0 +1,21 @@
$OpenBSD: patch-rules_mak,v 1.3 2013/02/02 23:51:45 brad Exp $
Build option ROM .S files with separate preprocessor and
assembler steps because the C compiler could be unsuitable.
--- rules.mak.orig Sat Feb 2 12:44:07 2013
+++ rules.mak Sat Feb 2 12:44:47 2013
@@ -25,8 +25,11 @@ else
$(call quiet-command,$(LIBTOOL) --mode=compile --quiet --tag=CC $(CC) $(QEMU_INCLUDES) $(QEMU_CFLAGS) $(QEMU_DGFLAGS) $(CFLAGS) -c -o $@ $<," lt CC $@")
endif
-%.o: %.S
- $(call quiet-command,$(CC) $(QEMU_INCLUDES) $(QEMU_CFLAGS) $(QEMU_DGFLAGS) $(CFLAGS) -c -o $@ $<," AS $(TARGET_DIR)$@")
+%.asm: %.S
+ $(call quiet-command,$(CPP) $(QEMU_INCLUDES) $(QEMU_CFLAGS) $(QEMU_DGFLAGS) $(CFLAGS) -o $@ $<," CPP $(TARGET_DIR)$@")
+
+%.o: %.asm
+ $(call quiet-command,$(AS) $(ASFLAGS) -o $@ $<," AS $(TARGET_DIR)$@")
%.o: %.m
$(call quiet-command,$(OBJCC) $(QEMU_INCLUDES) $(QEMU_CFLAGS) $(QEMU_DGFLAGS) $(CFLAGS) -c -o $@ $<," OBJC $(TARGET_DIR)$@")