cpet/freebsd-ports
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
bcf5948e98
freebsd-ports/cad
History
Fernando Apesteguía de962e514b cad/gmsh: update to 4.1.0 
PR:	235037
Reported by:	chitty_cloud@me.com
2019-01-22 18:38:58 +00:00
..
abc
admesh
adms
alliance
astk-client
astk-serveur
atlc
basicdsp
brickutils
brlcad
calculix
calculix-ccx
cascade
chipvault
cura-engine
dinotrace
dxf2fig
electric
electric-ng
elmerfem
feappv
fidocadj
freecad Fix Qt5 symbol version scripts to put the catch-all clause first. When 2019-01-16 11:13:44 +00:00
freehdl
fritzing Fix Qt5 symbol version scripts to put the catch-all clause first. When 2019-01-16 11:13:44 +00:00
gdsreader
gdt
geda
gerbv
ghdl
gmsh cad/gmsh: update to 4.1.0 2019-01-22 18:38:58 +00:00
gnucap
gplcver
gspiceui
gtkwave
impact
irsim
iverilog
jspice3
k40-whisperer
kicad
kicad-devel
kicad-library-footprints
kicad-library-footprints-devel
kicad-library-packages3d
kicad-library-packages3d-devel
kicad-library-symbols
kicad-library-symbols-devel
kicad-library-templates
kicad-library-templates-devel
klayout
layouteditor
ldraw
leocad
libopencad
librecad Fix Qt5 symbol version scripts to put the catch-all clause first. When 2019-01-16 11:13:44 +00:00
libredwg
linux-eagle5
linuxcnc-devel
logisim
magic
meshdev
meshlab
NASTRAN-95
netgen
ngspice_rework
opencascade cad/opencascade: Do not set VIS_CMAKE_ON twice 2019-01-21 06:09:00 +00:00
openscad
openscad-devel Fix Qt5 symbol version scripts to put the catch-all clause first. When 2019-01-16 11:13:44 +00:00
openvsp Use USE_GL 2019-01-15 15:05:33 +00:00
p5-GDS2
p5-Verilog-Perl
pcb
pdnmesh
py-gdspy
py-lcapy
py-pycam
py-pyfda Fix Qt5 symbol version scripts to put the catch-all clause first. When 2019-01-16 11:13:44 +00:00
python-gdsii
pythoncad
qcad Fix Qt5 symbol version scripts to put the catch-all clause first. When 2019-01-16 11:13:44 +00:00
qelectrotech Fix Qt5 symbol version scripts to put the catch-all clause first. When 2019-01-16 11:13:44 +00:00
qfsm
qmls
qucs
repsnapper
rubygem-gdsii
scotch
solvespace
sp2sp
spice
stepcode
sumo
sweethome3d
tkgate
tochnog
transcalc
varkon
verilator cad/verilator: create port 2019-01-17 23:27:11 +00:00
verilog-mode.el
xcircuit
xtrkcad Use USES=pkgconfig where appropriate 2019-01-13 15:17:23 +00:00
z88
zcad
Makefile cad/verilator: create port 2019-01-17 23:27:11 +00:00