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and accelerated primitives useful in digital signal processing (DSP).
Except for the Reed-Solomon codecs, these functions take full advantage of
the MMX, SSE and SSE2 SIMD instruction sets on Intel/AMD IA-32 processors
and the Altivec/VMX/Velocity Engine SIMD instruction set on the
G4 and G5 PowerPC.
The library includes Viterbi decoders for the following convolutional codes:
rate 1/2 k=7
rate 1/2 k=9
rate 1/6 k=15 ("Cassini")
plus two Reed-Solomon encoder-decoders:
one optimized for the (255,223) CCSDS standard code
a general purpose encoder/decoder for arbitrary RS codes
and three low-level 16-bit DSP support routines:
signed dot product
peak detection
sum-of-squares (energy) computation
This library is licensed under the "lesser" GNU General Public License.
WWW: http://www.ka9q.net/code/fec/
- Diane Bruce, VA3DB
db@db.net
PR: ports/99895
Submitted by: db
4 lines
186 B
Plaintext
4 lines
186 B
Plaintext
MD5 (fec-2.1.1.tar.bz2) = 3dca8111b8ce46809a7ea51b9d9df746
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SHA256 (fec-2.1.1.tar.bz2) = 4984ff33ed7609189c50f216e0a20eef1c72b72b031cdc0afbed80066073e99e
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SIZE (fec-2.1.1.tar.bz2) = 85871
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