cad/yosys: Update 0.22 -> 0.24

Reported by:	portscout
This commit is contained in:
Yuri Victorovich 2022-12-09 00:40:03 -08:00
parent 610f26a5a7
commit a8209dd11b
3 changed files with 12 additions and 4 deletions

View File

@ -1,6 +1,6 @@
PORTNAME= yosys
DISTVERSIONPREFIX= yosys-
DISTVERSION= 0.22
DISTVERSION= 0.24
CATEGORIES= cad
MAINTAINER= yuri@FreeBSD.org

View File

@ -1,3 +1,3 @@
TIMESTAMP = 1665165926
SHA256 (YosysHQ-yosys-yosys-0.22_GH0.tar.gz) = 2a0c29b6f66b3ee70316dd734eceb14f452445a83ccac600b97100ffd7c7a7aa
SIZE (YosysHQ-yosys-yosys-0.22_GH0.tar.gz) = 2362180
TIMESTAMP = 1670571827
SHA256 (YosysHQ-yosys-yosys-0.24_GH0.tar.gz) = 6a00b60e2d6bc8df0db1e66aa27af42a0694121cfcd6a3cf6f39c9329ed91263
SIZE (YosysHQ-yosys-yosys-0.24_GH0.tar.gz) = 2659037

View File

@ -44,6 +44,13 @@ bin/yosys-witness
%%DATADIR%%/efinix/cells_map.v
%%DATADIR%%/efinix/cells_sim.v
%%DATADIR%%/efinix/gbuf_map.v
%%DATADIR%%/fabulous/cells_map.v
%%DATADIR%%/fabulous/ff_map.v
%%DATADIR%%/fabulous/io_map.v
%%DATADIR%%/fabulous/latches_map.v
%%DATADIR%%/fabulous/prims.v
%%DATADIR%%/fabulous/ram_regfile.txt
%%DATADIR%%/fabulous/regfile_map.v
%%DATADIR%%/gate2lut.v
%%DATADIR%%/gatemate/arith_map.v
%%DATADIR%%/gatemate/brams.txt
@ -192,6 +199,7 @@ bin/yosys-witness
%%DATADIR%%/sf2/cells_sim.v
%%DATADIR%%/simcells.v
%%DATADIR%%/simlib.v
%%DATADIR%%/smtmap.v
%%DATADIR%%/techmap.v
%%DATADIR%%/xilinx/abc9_model.v
%%DATADIR%%/xilinx/arith_map.v