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New port: cad/veroroute: PCB (printed circuit board) design software

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This commit is contained in:
Yuri Victorovich 2020-02-02 03:12:59 +00:00
parent 7b0bd462de
commit 190e1f518b
Notes: svn2git 2021-03-31 03:12:20 +00:00 
svn path=/head/; revision=524803
4 changed files with 37 additions and 0 deletions
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1
cad/Makefile
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@ -107,6 +107,7 @@
SUBDIR += varkon
SUBDIR += verilator
SUBDIR += verilog-mode.el
SUBDIR += veroroute
SUBDIR += xcircuit
SUBDIR += yosys
SUBDIR += z88

28
cad/veroroute/Makefile Normal file
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@ -0,0 +1,28 @@
# $FreeBSD$
PORTNAME= veroroute
DISTVERSIONPREFIX= V
DISTVERSION= 174
DISTVERSIONSUFFIX= _Src
CATEGORIES= cad
MASTER_SITES= SF/${PORTNAME}/
DISTNAME= VeroRoute_${DISTVERSIONFULL}
MAINTAINER= yuri@FreeBSD.org
COMMENT= PCB (printed circuit board) design software
LICENSE= GPLv3
LICENSE_FILE= ${WRKSRC}/../licenses/license_GPLv3.txt
USES= qmake qt:5 zip
USE_QT= core gui network widgets buildtools_build
WRKSRC= ${WRKDIR}/VeroRoute
WRKSRC_SUBDIR= Src
PLIST_FILES= bin/${PORTNAME}
do-install: # https://sourceforge.net/p/veroroute/tickets/17/
${INSTALL_PROGRAM} ${WRKSRC}/../${PORTNAME} ${STAGEDIR}${PREFIX}/bin
.include <bsd.port.mk>

3
cad/veroroute/distinfo Normal file
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@ -0,0 +1,3 @@
TIMESTAMP = 1580612136
SHA256 (VeroRoute_V174_Src.zip) = 643c583fc0cbac9ee36db40b250853646151f514f7b2887caaba4038417bd7c1
SIZE (VeroRoute_V174_Src.zip) = 928424

5
cad/veroroute/pkg-descr Normal file
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@ -0,0 +1,5 @@
Cross-platform software for producing Veroboard (stripboard), Perfboard, and
single-sided PCB layouts. Automatically prevents short circuits and checks for
open circuits.
WWW: https://sourceforge.net/projects/veroroute/