Files
stack/hope/impl/pnr/hope.timing_paths
2026-03-07 23:45:11 -05:00

1884 lines
23 KiB
Plaintext

=====
SETUP
9.949
32.386
42.335
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/seq_y_3_s0
30.766
31.321
microcode_rom_microcode_rom_0_0_s
32.386
=====
SETUP
10.031
32.304
42.335
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/seq_y_8_s0
30.620
31.073
microcode_rom_microcode_rom_0_0_s
32.304
=====
SETUP
10.051
32.284
42.335
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/seq_y_5_s0
30.766
31.219
microcode_rom_microcode_rom_0_0_s
32.284
=====
SETUP
10.132
32.203
42.335
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/seq_y_0_s0
30.369
30.822
microcode_rom_microcode_rom_0_0_s
32.203
=====
SETUP
10.384
31.951
42.335
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/seq_y_1_s0
30.369
30.886
microcode_rom_microcode_rom_0_0_s
31.951
=====
SETUP
10.403
31.932
42.335
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n28_s2
29.697
30.159
sequencer_inst/seq_y_7_s0
30.161
30.716
microcode_rom_microcode_rom_0_0_s
31.932
=====
SETUP
10.518
31.816
42.335
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/seq_y_6_s0
30.176
30.629
microcode_rom_microcode_rom_0_0_s
31.816
=====
SETUP
10.518
31.816
42.335
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/seq_y_2_s0
30.176
30.629
microcode_rom_microcode_rom_0_0_s
31.816
=====
SETUP
10.539
31.796
42.335
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/seq_y_4_s0
30.360
30.731
microcode_rom_microcode_rom_0_0_s
31.796
=====
SETUP
11.010
31.325
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/n31_s0
30.863
31.325
sequencer_inst/pc_4_s0
31.325
=====
SETUP
11.177
31.158
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/n32_s0
30.609
31.158
sequencer_inst/pc_3_s0
31.158
=====
SETUP
11.252
31.082
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/n27_s0
30.620
31.082
sequencer_inst/pc_8_s0
31.082
=====
SETUP
11.305
31.029
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n29_s2
29.697
30.150
sequencer_inst/n29_s0
30.567
31.029
sequencer_inst/pc_6_s0
31.029
=====
SETUP
11.343
30.991
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/n33_s0
30.620
30.991
sequencer_inst/pc_2_s0
30.991
=====
SETUP
11.404
30.930
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/n28_s0
30.360
30.930
sequencer_inst/pc_7_s0
30.930
=====
SETUP
11.416
30.918
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/n35_s8
30.369
30.918
sequencer_inst/pc_0_s2
30.918
=====
SETUP
11.503
30.831
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/n34_s0
30.369
30.831
sequencer_inst/pc_1_s0
30.831
=====
SETUP
11.603
30.731
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_4_s7
21.258
21.629
alu_inst/alu_y_4_s4
21.634
22.096
alu_inst/alu_y_4_s2
22.097
22.646
alu_inst/alu_y_4_s0
22.647
23.100
sequencer_inst/n27_s16
24.522
25.092
sequencer_inst/n27_s12
25.236
25.785
sequencer_inst/n27_s10
25.957
26.328
sequencer_inst/n27_s9
27.012
27.474
sequencer_inst/n27_s6
27.476
28.046
sequencer_inst/n27_s4
28.218
28.671
sequencer_inst/n27_s3
29.697
30.150
sequencer_inst/n30_s0
30.360
30.731
sequencer_inst/pc_5_s0
30.731
=====
SETUP
16.152
26.182
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_10_s4
21.153
21.524
alu_inst/alu_y_10_s2
21.938
22.487
alu_inst/alu_y_10_s0
22.488
22.941
register_file_inst/n868_s0
25.612
26.182
register_file_inst/data_registers[0]_10_s1
26.182
=====
SETUP
16.196
26.139
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_10_s4
21.153
21.524
alu_inst/alu_y_10_s2
21.938
22.487
alu_inst/alu_y_10_s0
22.488
22.941
register_file_inst/data_registers[1]_10_s0
26.139
=====
SETUP
16.345
25.989
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_10_s4
21.153
21.524
alu_inst/alu_y_10_s2
21.938
22.487
alu_inst/alu_y_10_s0
22.488
22.941
register_file_inst/data_registers[2]_10_s0
25.989
=====
SETUP
16.761
25.573
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_24_s11
20.716
21.271
alu_inst/alu_y_24_s3
21.927
22.298
alu_inst/alu_y_24_s
22.954
23.509
register_file_inst/n854_s0
25.111
25.573
register_file_inst/data_registers[0]_24_s1
25.573
=====
SETUP
16.852
25.482
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_24_s11
20.716
21.271
alu_inst/alu_y_24_s3
21.927
22.298
alu_inst/alu_y_24_s
22.954
23.509
register_file_inst/data_registers[2]_24_s0
25.482
=====
SETUP
16.921
25.413
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_7_s8
20.958
21.411
alu_inst/alu_y_7_s4
21.901
22.363
alu_inst/alu_y_7_s1
22.535
22.997
alu_inst/alu_y_7_s0
22.999
23.516
register_file_inst/data_registers[2]_7_s0
25.413
=====
SETUP
16.921
25.413
42.334
i_clk_ibuf
0.000
2.088
microcode_rom_microcode_rom_0_0_s
5.329
7.589
register_file_inst/addr_registers[0]_ER_CL_s44
8.569
9.086
register_file_inst/addr_registers[0]_ER_CL_s41
9.499
9.870
register_file_inst/addr_registers[0]_ER_init_s20
10.283
10.654
register_file_inst/alu_a_4_s2
11.842
12.397
register_file_inst/alu_a_4_s
12.810
13.327
alu_inst/mult_172_s1
16.543
20.303
alu_inst/alu_y_7_s8
20.958
21.411
alu_inst/alu_y_7_s4
21.901
22.363
alu_inst/alu_y_7_s1
22.535
22.997
alu_inst/alu_y_7_s0
22.999
23.516
register_file_inst/data_registers[1]_7_s0
25.413
=====
HOLD
0.327
4.159
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_1_s1
3.583
3.785
sram_srom_inst/sram0_sram0_0_0_s
4.159
=====
HOLD
0.341
4.173
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_0_s1
3.583
3.785
sram_srom_inst/sram0_sram0_0_0_s
4.173
=====
HOLD
0.427
4.021
3.594
i_clk_ibuf
0.000
1.392
sequencer_inst/pc_1_s0
3.583
3.785
sequencer_inst/n34_s0
3.789
4.021
sequencer_inst/pc_1_s0
4.021
=====
HOLD
0.427
4.021
3.594
i_clk_ibuf
0.000
1.392
sequencer_inst/pc_6_s0
3.583
3.785
sequencer_inst/n29_s0
3.789
4.021
sequencer_inst/pc_6_s0
4.021
=====
HOLD
0.428
4.022
3.594
i_clk_ibuf
0.000
1.392
sequencer_inst/pc_7_s0
3.583
3.785
sequencer_inst/n28_s0
3.790
4.022
sequencer_inst/pc_7_s0
4.022
=====
HOLD
0.429
4.023
3.594
i_clk_ibuf
0.000
1.392
sequencer_inst/pc_3_s0
3.583
3.785
sequencer_inst/n32_s0
3.791
4.023
sequencer_inst/pc_3_s0
4.023
=====
HOLD
0.485
4.079
3.594
i_clk_ibuf
0.000
1.392
sequencer_inst/pc_0_s2
3.583
3.785
sequencer_inst/n35_s8
3.789
4.079
sequencer_inst/pc_0_s2
4.079
=====
HOLD
0.485
4.079
3.594
i_clk_ibuf
0.000
1.392
sequencer_inst/pc_2_s0
3.583
3.785
sequencer_inst/n33_s0
3.789
4.079
sequencer_inst/pc_2_s0
4.079
=====
HOLD
0.514
4.346
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_7_s1
3.583
3.785
sram_srom_inst/sram0_sram0_0_1_s
4.346
=====
HOLD
0.542
4.136
3.594
i_clk_ibuf
0.000
1.392
sequencer_inst/pc_4_s0
3.583
3.784
sequencer_inst/n31_s0
3.904
4.136
sequencer_inst/pc_4_s0
4.136
=====
HOLD
0.546
4.140
3.594
i_clk_ibuf
0.000
1.392
sequencer_inst/pc_8_s0
3.583
3.784
sequencer_inst/n27_s0
3.908
4.140
sequencer_inst/pc_8_s0
4.140
=====
HOLD
0.558
4.390
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_2_s1
3.583
3.785
sram_srom_inst/wdata1_2_s0
4.036
4.268
sram_srom_inst/sram1_sram1_0_0_s
4.390
=====
HOLD
0.560
4.154
3.594
i_clk_ibuf
0.000
1.392
sequencer_inst/pc_5_s0
3.583
3.785
sequencer_inst/n30_s0
3.790
4.154
sequencer_inst/pc_5_s0
4.154
=====
HOLD
0.571
4.403
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_2_s1
3.583
3.785
sram_srom_inst/sram0_sram0_0_0_s
4.403
=====
HOLD
0.612
4.444
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_3_s1
3.583
3.785
sram_srom_inst/sram0_sram0_0_0_s
4.444
=====
HOLD
0.651
4.483
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_4_s1
3.583
3.785
sram_srom_inst/sram0_sram0_0_1_s
4.483
=====
HOLD
0.721
4.553
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_8_s1
3.583
3.785
sram_srom_inst/wdata1_0_s0
4.199
4.431
sram_srom_inst/sram1_sram1_0_0_s
4.553
=====
HOLD
0.837
4.669
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_1_s1
3.583
3.785
sram_srom_inst/wdata1_1_s0
4.059
4.403
sram_srom_inst/sram1_sram1_0_0_s
4.669
=====
HOLD
0.846
4.678
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_1_s1
3.583
3.785
sram_srom_inst/wdata2_1_s1
4.320
4.555
sram_srom_inst/sram2_sram2_0_0_s
4.678
=====
HOLD
0.848
4.680
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_16_s1
3.583
3.785
sram_srom_inst/wdata2_0_s1
4.196
4.431
sram_srom_inst/sram2_sram2_0_0_s
4.680
=====
HOLD
0.851
4.683
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_20_s1
3.583
3.785
sram_srom_inst/wdata2_4_s1
3.909
4.300
sram_srom_inst/sram2_sram2_0_1_s
4.683
=====
HOLD
0.863
4.695
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_2_s1
3.583
3.785
sram_srom_inst/wdata3_2_s0
4.036
4.268
sram_srom_inst/sram3_sram3_0_0_s
4.695
=====
HOLD
0.890
4.722
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_19_s1
3.583
3.785
sram_srom_inst/wdata2_3_s1
4.208
4.599
sram_srom_inst/sram2_sram2_0_0_s
4.722
=====
HOLD
0.891
4.485
3.594
i_clk_ibuf
0.000
1.392
sram_srom_inst/mdata_6_s0
3.583
3.784
register_file_inst/n872_s2
3.906
4.138
register_file_inst/n872_s0
4.141
4.485
register_file_inst/data_registers[0]_6_s1
4.485
=====
HOLD
0.896
4.728
3.832
i_clk_ibuf
0.000
1.392
register_file_inst/data_registers[0]_11_s1
3.583
3.785
sram_srom_inst/wdata1_3_s0
4.172
4.462
sram_srom_inst/sram1_sram1_0_0_s
4.728