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Fix the magic linking of subdir lib.o files

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Make will 'expand' all variables at initialization so we cannot rely on
checking subdir/lib.o since it might not have been build yet. Instead
use 'test && echo' on the ld command line.
This commit is contained in:
Jonas Fonseca 2005-10-20 03:39:59 +02:00 committed by Jonas Fonseca
parent a617d5b140
commit dad4a54232
1 changed files with 3 additions and 11 deletions
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14
Makefile.lib
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@ -30,7 +30,9 @@ quiet_cmd_compile = ' [CC] $(RELPATH)$<'
# Rule to compile a set of .o files into one .o file
quiet_cmd_ld_objs = " [LD] $(RELPATH)$@"
cmd_ld_objs = $(LD) -r -o $@ $(filter $(OBJS), $^)
cmd_ld_objs = $(LD) -r -o $@ $(filter $(OBJS), $^) \
$(foreach subdir,$(sort $(filter-out src,$(SUBDIRS))), \
`test -e $(subdir)/lib.o && echo $(subdir)/lib.o`)
quiet_cmd_link = ' [LINK] $(RELPATH)$@'
cmd_link = $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS)
@ -74,16 +76,6 @@ ifdef OBJS-yes
OBJS += $(OBJS-yes)
endif
ifdef SUBDIRS
# Apparently wildcard won't expand *.o files so check if there are any *.c
# files and use that to magically add the lib.o file of the subdirectory.
subobjs := $(strip $(foreach subdir,$(sort $(filter-out src,$(SUBDIRS))), \
$(if $(wildcard $(subdir)/*.c),$(subdir)/lib.o)))
endif
ifneq ($(subobjs),)
OBJS += $(subobjs)
endif
ifdef OBJS
lib.o: $(sort $(OBJS))
$(call cmd,ld_objs)