395 lines
13 KiB
C
395 lines
13 KiB
C
/* adc.c -- system layer
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** Copyright (c) 2020-2021 Renaud Fivet
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**
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** ADC for temperature sensor and Vrefint
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** gpioa low level API and usleep()
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** interrupt based serial transmission
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** clocks configuration: HSI, HSE, PLL HSI, PLL HSE
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** implements system.h interface: uptime, init(), kputc(), kputs(), yield()
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** uptime = seconds elapsed since boot
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** Serial tx, SysClck 8MHz HSI based, baudrate 9600, Busy wait transmission
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** user LED toggled every second
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** SysTick interrupt every second
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*/
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#include "system.h" /* implements system.h */
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/** CORE **********************************************************************/
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#define SYSTICK ((volatile unsigned long *) 0xE000E010)
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#define SYSTICK_CSR SYSTICK[ 0]
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#define SYSTICK_RVR SYSTICK[ 1]
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#define SYSTICK_CVR SYSTICK[ 2]
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#define NVIC ((volatile long *) 0xE000E100)
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#define NVIC_ISER NVIC[ 0]
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#define unmask_irq( idx) NVIC_ISER = 1 << idx
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#define USART1_IRQ_IDX 27
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/** PERIPH ********************************************************************/
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#define CAT( a, b) a##b
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#define RCC ((volatile long *) 0x40021000)
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#define RCC_CR RCC[ 0]
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#define RCC_CR_HSION 0x00000001 /* 1: Internal High Speed clock enable */
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#define RCC_CR_HSEON 0x00010000 /* 16: External High Speed clock enable */
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#define RCC_CR_HSERDY 0x00020000 /* 17: External High Speed clock ready flag */
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#define RCC_CR_PLLON 0x01000000 /* 24: PLL enable */
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#define RCC_CR_PLLRDY 0x02000000 /* 25: PLL clock ready flag */
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#define RCC_CFGR RCC[ 1]
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#define RCC_CFGR_SW_MSK 0x00000003 /* 1-0: System clock SWitch Mask */
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#define RCC_CFGR_SW_HSE 0x00000001 /* 1-0: Switch to HSE as system clock */
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#define RCC_CFGR_SW_PLL 0x00000002 /* 1-0: Switch to PLL as system clock */
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#define RCC_CFGR_SWS_MSK 0x0000000C /* 3-2: System clock SWitch Status Mask */
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#define RCC_CFGR_SWS_HSE 0x00000004 /* 3-2: HSE used as system clock */
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#define RCC_CFGR_SWS_PLL 0x00000008 /* 3-2: PLL used as system clock */
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#define RCC_CFGR_PLLSRC 0x00010000
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#define RCC_CFGR_PLLSRC_HSI 0x00000000 /* HSI / 2 */
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#define RCC_CFGR_PLLSRC_HSE 0x00010000 /* HSE */
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#define RCC_CFGR_PLLXTPRE 0x00020000
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#define RCC_CFGR_PLLXTPRE_DIV1 0x00000000 /* HSE */
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#define RCC_CFGR_PLLXTPRE_DIV2 0x00020000 /* HSE / 2 */
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#define RCC_CFGR_PLLMUL_MSK (0x00F << 18)
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#define RCC_CFGR_PLLMUL( v) ((v - 2) << 18)
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#define RCC_AHBENR RCC[ 5]
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#define RCC_AHBENR_IOPn( n) (1 << (17 + n))
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#define RCC_AHBENR_IOPh( h) RCC_AHBENR_IOPn( CAT( 0x, h) - 0xA)
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#define RCC_APB2ENR RCC[ 6]
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#define RCC_APB2ENR_USART1EN 0x00004000 /* 14: USART1 clock enable */
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#define RCC_APB2ENR_ADCEN 0x00000200 /* 9: ADC clock enable */
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#define RCC_CR2 RCC[ 13]
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#define RCC_CR2_HSI14ON 0x00000001 /* 1: HSI14 clock enable */
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#define RCC_CR2_HSI14RDY 0x00000002 /* 2: HSI14 clock ready */
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#define GPIOA ((volatile long *) 0x48000000)
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#define GPIOB ((volatile long *) 0x48000400)
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#define GPIO( x) CAT( GPIO, x)
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#define MODER 0
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#define IDR 4
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#define ODR 5
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#define AFRH 9
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#define ADC ((volatile long *) 0x40012400)
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#define ADC_ISR ADC[ 0]
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#define ADC_ISR_ADRDY 1 /* 0: ADC Ready */
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#define ADC_ISR_EOC 4 /* 2: End Of Conversion flag */
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#define ADC_CR ADC[ 2]
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#define ADC_CR_ADEN 1 /* 0: ADc ENable command */
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#define ADC_CR_ADSTART 4 /* 2: ADC Start Conversion command */
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#define ADC_CR_ADCAL (1 << 31) /* 31: ADC Start Calibration cmd */
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#define ADC_CFGR1 ADC[ 3] /* Configuration Register 1 */
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#define ADC_CFGR1_SCANDIR 4 /* 2: Scan sequence direction */
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#define ADC_CFGR1_DISCEN (1 << 16) /* 16: Enable Discontinuous mode */
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#define ADC_CFGR2 ADC[ 4] /* Configuration Register 2 */
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#define ADC_CFGR2_CKMODE (3 << 30) /* 31-30: Clock Mode Mask */
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/* 31-30: Default 00 HSI14 */
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#define ADC_CFGR2_PCLK2 (1 << 30) /* 31-30: PCLK/2 */
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#define ADC_CFGR2_PCLK4 (2 << 30) /* 31-30: PCLK/4 */
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#define ADC_SMPR ADC[ 5] /* Sampling Time Register */
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#define ADC_CHSELR ADC[ 10] /* Channel Selection Register */
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#define ADC_DR ADC[ 16] /* Data Register */
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#define ADC_CCR ADC[ 194] /* Common Configuration Register */
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#define ADC_CCR_VREFEN (1 << 22) /* 22: Vrefint Enable */
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#define ADC_CCR_TSEN (1 << 23) /* 23: Temperature Sensor Enable */
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#define USART1 ((volatile long *) 0x40013800)
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#define CR1 0 /* Config Register */
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#define BRR 3 /* BaudRate Register */
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#define ISR 7 /* Interrupt and Status Register */
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#define TDR 10 /* Transmit Data Register*/
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#define USART_CR1_TXEIE (1 << 7) /* 7: TDR Empty Interrupt Enable */
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#define USART_CR1_TE 8 /* 3: Transmit Enable */
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#define USART_CR1_RE 4 /* 2: Receive Enable */
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#define USART_CR1_UE 1 /* 0: USART Enable */
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#define USART_ISR_TXE (1 << 7) /* 7: Transmit Data Register Empty */
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/** SYSTEM MEMORY *************************************************************/
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/* STM32F030 calibration addresses (at 3.3V and 30C) */
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#define TS_CAL1 ((unsigned short *) 0x1FFFF7B8)
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#define VREFINT_CAL ((unsigned short *) 0x1FFFF7BA)
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/* user LED ON when PA4 is low */
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#define LED_IOP A
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#define LED_PIN 4
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#define LED_ON 0
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/* 8MHz quartz, configure PLL at 28MHz */
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//#define HSE 8000000
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#define PLL 7
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#define BAUD 9600
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//#define HSI14 1
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#ifdef PLL
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# ifdef HSE
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# define CLOCK HSE / 2 * PLL
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# else /* HSI */
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# define CLOCK 8000000 / 2 * PLL
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# endif
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# if CLOCK < 16000000
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# error PLL output below 16MHz
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# endif
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#elif defined( HSE)
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# define CLOCK HSE
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#else /* HSI */
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# define CLOCK 8000000
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#endif
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#if CLOCK > 48000000
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# error clock frequency exceeds 48MHz
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#endif
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#if CLOCK % BAUD
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# warning baud rate not accurate at that clock frequency
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#endif
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static unsigned char txbuf[ 8] ; // best if size is a power of 2 for cortex-M0
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#define TXBUF_SIZE (sizeof txbuf / sizeof txbuf[ 0])
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static unsigned char txbufin ;
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static volatile unsigned char txbufout ;
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void USART1_Handler( void) {
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if( txbufout == txbufin) {
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/* Empty buffer => Disable TXEIE */
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USART1[ CR1] &= ~USART_CR1_TXEIE ;
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} else {
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static unsigned char lastc ;
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unsigned char c ;
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c = txbuf[ txbufout] ;
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if( c == '\n' && lastc != '\r')
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c = '\r' ;
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else
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txbufout = (txbufout + 1) % TXBUF_SIZE ;
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USART1[ TDR] = c ;
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lastc = c ;
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}
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}
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void kputc( unsigned char c) { /* character output */
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int nextidx ;
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/* Wait if buffer full */
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nextidx = (txbufin + 1) % TXBUF_SIZE ;
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while( nextidx == txbufout)
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yield() ;
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txbuf[ txbufin] = c ;
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txbufin = nextidx ;
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/* Trigger transmission by enabling interrupt */
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USART1[ CR1] |= USART_CR1_TXEIE ;
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}
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int kputs( const char s[]) { /* string output */
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int cnt = 0 ;
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int c ;
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while( (c = *s++) != 0) {
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kputc( c) ;
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cnt += 1 ;
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}
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return cnt ;
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}
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void yield( void) { /* give way */
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__asm( "WFI") ; /* Wait for System Tick Interrupt */
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}
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volatile unsigned uptime ; /* seconds elapsed since boot */
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#ifdef LED_ON
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static void userLEDtoggle( void) {
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GPIO( LED_IOP)[ ODR] ^= 1 << LED_PIN ; /* Toggle User LED */
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}
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#endif
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void SysTick_Handler( void) {
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uptime += 1 ;
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#ifdef LED_ON
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userLEDtoggle() ;
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#endif
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}
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void usleep( unsigned usecs) { /* wait at least usec µs */
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#if CLOCK / 8000000 < 1
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# error HCLK below 8 MHz
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#elif CLOCK % 8000000
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# warning HCLK is not multiple of 8 MHz
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#endif
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usecs = SYSTICK_CVR - (CLOCK / 8000000 * usecs) ;
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while( SYSTICK_CVR > usecs) ;
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}
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/* GPIOA low level API ********************************************************/
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void gpioa_input( int pin) { /* Configure GPIOA pin as input */
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GPIOA[ MODER] &= ~(3 << (pin * 2)) ; /* Apin as input [00] */
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}
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void gpioa_output( int pin) { /* Configure GPIOA pin as output */
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GPIOA[ MODER] |= 1 << (pin * 2) ; /* Apin output (over [00]) */
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}
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iolvl_t gpioa_read( int pin) { /* Read level of GPIOA pin */
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return LOW != (GPIOA[ IDR] & (1 << pin)) ;
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}
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static void adc_init( void) {
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/* Enable ADC peripheral */
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RCC_APB2ENR |= RCC_APB2ENR_ADCEN ;
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/* Setup ADC sampling clock */
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#ifdef HSI14
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RCC_CR2 |= RCC_CR2_HSI14ON ; /* Start HSI14 clock */
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do {} while( !( RCC_CR2 & RCC_CR2_HSI14RDY)) ; /* Wait for stable clock */
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/* Select HSI14 as sampling clock for ADC */
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// ADC_CFGR2 &= ~ADC_CFGR2_CKMODE ; /* Default 00 == HSI14 */
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#else
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/* Select PCLK/2 as sampling clock for ADC */
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ADC_CFGR2 |= ADC_CFGR2_PCLK2 ; /* 01 PCLK/2 Over default 00 */
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// ADC_CFGR2 |= ADC_CFGR2_PCLK4 ; /* 10 PCLK/4 Over default 00 */
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#endif
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/* Calibration */
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ADC_CR |= ADC_CR_ADCAL ;
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do {} while( ADC_CR & ADC_CR_ADCAL) ; /* Wait end of calibration */
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/* Enable Command (below Work Around from Errata necessary with PCLK/4) */
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do {
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ADC_CR |= ADC_CR_ADEN ;
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} while( !( ADC_ISR & ADC_ISR_ADRDY)) ;
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/* Select inputs, precision and scan direction */
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ADC_CHSELR = 3 << 16 ; /* Channel 16: temperature, Channel 17: Vrefint */
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ADC_SMPR = 7 ;
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ADC_CCR |= ADC_CCR_TSEN | ADC_CCR_VREFEN ;
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/* Default scan direction (00) is Temperature before Voltage */
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// ADC_CFGR1 &= ~ADC_CFGR1_SCANDIR ; /* Default 0 is low to high */
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ADC_CFGR1 |= ADC_CFGR1_DISCEN ; /* Enable Discontinuous mode */
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}
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static unsigned adc_convert( void) {
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/* Either only one channel in sequence or Discontinuous mode ON */
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ADC_CR |= ADC_CR_ADSTART ; /* Start ADC conversion */
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do {} while( ADC_CR & ADC_CR_ADSTART) ; /* Wait for start command cleared */
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return ADC_DR ;
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}
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void adc_vnt( vnt_cmd_t cmd, short *ptrV, short *ptrC) {
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if( cmd == VNT_INIT)
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adc_init() ;
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if( cmd <= VNT_CAL) {
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/* Calibration Values */
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*ptrV = *VREFINT_CAL ;
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*ptrC = *TS_CAL1 ;
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return ;
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}
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/* ADC Conversion */
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*ptrC = adc_convert() ;
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*ptrV = adc_convert() ;
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if( cmd == VNT_VNC) {
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*ptrC = 300 + (*TS_CAL1 - *ptrC * *VREFINT_CAL / *ptrV) * 10000 / 5336 ;
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*ptrV = 330 * *VREFINT_CAL / *ptrV ;
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}
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}
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int init( void) {
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/* By default SYSCLK == HSI [8MHZ] */
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#ifdef HSE
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/* Start HSE clock (8 MHz external oscillator) */
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RCC_CR |= RCC_CR_HSEON ;
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/* Wait for oscillator to stabilize */
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do {} while( (RCC_CR & RCC_CR_HSERDY) == 0) ;
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#endif
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#ifdef PLL
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/* Setup PLL HSx/2 * 6 [24MHz] */
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/* Default 0: PLL HSI/2 src, PLL MULL * 2 */
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RCC_CFGR =
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# ifdef HSE
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RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_DIV2 |
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# endif
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RCC_CFGR_PLLMUL( PLL) ;
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RCC_CR |= RCC_CR_PLLON ;
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do {} while( (RCC_CR & RCC_CR_PLLRDY) == 0) ; /* Wait for PLL */
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/* Switch to PLL as system clock SYSCLK == PLL [24MHz] */
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RCC_CFGR = (RCC_CFGR & ~RCC_CFGR_SW_MSK) | RCC_CFGR_SW_PLL ;
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do {} while( (RCC_CFGR & RCC_CFGR_SWS_MSK) != RCC_CFGR_SWS_PLL) ;
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#elif defined( HSE)
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/* Switch to HSE as system clock SYSCLK == HSE [8MHz] */
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RCC_CFGR = (RCC_CFGR & ~RCC_CFGR_SW_MSK) | RCC_CFGR_SW_HSE ;
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do {} while( (RCC_CFGR & RCC_CFGR_SWS_MSK) != RCC_CFGR_SWS_HSE) ;
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#endif
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#ifdef HSE
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/* Switch off HSI */
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RCC_CR &= ~RCC_CR_HSION ;
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#endif
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/* SYSTICK */
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SYSTICK_RVR = CLOCK / 8 - 1 ; /* HBA / 8 */
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SYSTICK_CVR = 0 ;
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SYSTICK_CSR = 3 ; /* HBA / 8, Interrupt ON, Enable */
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/* SysTick_Handler will execute every 1s from now on */
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#ifdef LED_ON
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/* User LED ON */
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RCC_AHBENR |= RCC_AHBENR_IOPh( LED_IOP) ; /* Enable IOPx periph */
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GPIO( LED_IOP)[ MODER] |= 1 << (LED_PIN * 2) ; /* LED_IO Output [01],
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** over default 00 */
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/* OTYPER Push-Pull by default */
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/* Pxn output default LOW at reset */
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# if LED_ON
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userLEDtoggle() ;
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# endif
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#endif
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/* USART1 9600 8N1 */
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RCC_AHBENR |= RCC_AHBENR_IOPh( A) ; /* Enable GPIOA periph */
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GPIOA[ MODER] |= 0x0A << (9 * 2) ; /* PA9-10 ALT 10, over default 00 */
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GPIOA[ AFRH] |= 0x110 ; /* PA9-10 AF1 0001, over default 0000 */
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RCC_APB2ENR |= RCC_APB2ENR_USART1EN ;
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USART1[ BRR] = CLOCK / BAUD ; /* PCLK is default source */
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USART1[ CR1] |= USART_CR1_UE | USART_CR1_TE ; /* Enable USART & Tx */
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/* Unmask USART1 irq */
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unmask_irq( USART1_IRQ_IDX) ;
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kputs(
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#ifdef PLL
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"PLL"
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#endif
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#ifdef HSE
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"HSE"
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#else
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"HSI"
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#endif
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"\n") ;
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return 0 ;
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}
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/* end of adc.c */
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