Original submission from Alessandro De Laurenzis, who takes MAINTAINER -- thanks! Additional work from sthen@ and myself, ok sthen@ ABC is a growing software system for synthesis and verification of binary sequential logic circuits appearing in synchronous hardware designs. ABC combines scalable logic optimization based on And-Inverter Graphs (AIGs), optimal-delay DAG-based technology mapping for look-up tables and standard cells, and innovative algorithms for sequential synthesis and verification.
3 lines
141 B
Plaintext
3 lines
141 B
Plaintext
SHA256 (abc-1.01.20180722-ae6716b0.tar.gz) = Zc9f2Vfbwzn49O61ozQySYos60qulZemoXThSewWHI4=
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SIZE (abc-1.01.20180722-ae6716b0.tar.gz) = 5653452
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