diff --git a/lang/iverilog/Makefile b/lang/iverilog/Makefile
new file mode 100644
index 00000000000..d55cced7ca4
--- /dev/null
+++ b/lang/iverilog/Makefile
@@ -0,0 +1,40 @@
+# $OpenBSD: Makefile,v 1.1.1.1 2010/07/08 18:58:23 jasper Exp $
+
+COMMENT=		Verilog simulation and synthesis tool
+
+V=			0.9.2
+DISTNAME=		verilog-$V
+PKGNAME=		iverilog-$V
+CATEGORIES=		lang devel
+
+HOMEPAGE=		http://www.icarus.com/eda/verilog/
+
+# GPLv2+
+PERMIT_PACKAGE_CDROM=	Yes
+PERMIT_PACKAGE_FTP=	Yes
+PERMIT_DISTFILES_CDROM=	Yes
+PERMIT_DISTFILES_FTP=	Yes
+
+MASTER_SITES=		ftp://ftp.icarus.com/pub/eda/verilog/v0.9/
+
+WANTLIB += c m readline stdc++ termcap z
+
+USE_GMAKE=		Yes
+
+BUILD_DEPENDS=		::devel/bison
+YACC=			bison
+
+CONFIGURE_STYLE=	gnu
+CONFIGURE_ARGS+=	${CONFIGURE_SHARED} \
+			--disable-suffix
+CFLAGS+=		-fPIC
+
+VVP_DOCS=		README.txt opcodes.txt
+DOC_DIR=		${PREFIX}/share/doc/iverilog
+
+post-install:
+	${INSTALL_DATA_DIR} ${DOC_DIR}/{ivlpp,vvp}
+	${INSTALL_DATA} ${WRKSRC}/*.txt ${DOC_DIR}
+	${INSTALL_DATA} ${WRKSRC}/vvp/{README,opcodes}.txt ${DOC_DIR}/vvp/
+	${INSTALL_DATA} ${WRKSRC}/ivlpp/ivlpp.txt ${DOC_DIR}/ivlpp/
+.include <bsd.port.mk>
diff --git a/lang/iverilog/distinfo b/lang/iverilog/distinfo
new file mode 100644
index 00000000000..9af7688834c
--- /dev/null
+++ b/lang/iverilog/distinfo
@@ -0,0 +1,5 @@
+MD5 (verilog-0.9.2.tar.gz) = 47NAnwp6o4LAv7sBllX2Rw==
+RMD160 (verilog-0.9.2.tar.gz) = 2+wH3Cnfv2nbwEufO7VGdFKStjA=
+SHA1 (verilog-0.9.2.tar.gz) = zmIrV96AJX+3C3/alSmQQ87UUdQ=
+SHA256 (verilog-0.9.2.tar.gz) = MhtvMrVgjXzddFqf+OIfPi7B/rqfDj+S2L1wQtgGR8M=
+SIZE (verilog-0.9.2.tar.gz) = 1127067
diff --git a/lang/iverilog/pkg/DESCR b/lang/iverilog/pkg/DESCR
new file mode 100644
index 00000000000..a4b6af60948
--- /dev/null
+++ b/lang/iverilog/pkg/DESCR
@@ -0,0 +1,12 @@
+Icarus Verilog is a Verilog simulation and synthesis tool. It operates
+as a compiler, compiling source code writen in Verilog (IEEE-1364) into
+some target format. For batch simulation, the compiler can generate C++
+code that is compiled and linked with a run time library (called "vvm")
+then executed as a command to run the simulation. For synthesis, the
+compiler generates netlists in the desired format.
+
+The compiler proper is intended to parse and elaborate design
+descriptions written to the IEEE standard IEEE Std 1364-2000. The
+standard proper is due to be release towards the middle of the year
+2000. This is a fairly large and complex standard, so it will take some
+time for it to get there, but that's the goal.
diff --git a/lang/iverilog/pkg/PLIST b/lang/iverilog/pkg/PLIST
new file mode 100644
index 00000000000..f95295b66a8
--- /dev/null
+++ b/lang/iverilog/pkg/PLIST
@@ -0,0 +1,65 @@
+@comment $OpenBSD: PLIST,v 1.1.1.1 2010/07/08 18:58:23 jasper Exp $
+@bin bin/iverilog
+bin/iverilog-vpi
+@bin bin/vvp
+include/iverilog/
+include/iverilog/_pli_types.h
+include/iverilog/acc_user.h
+include/iverilog/ivl_target.h
+include/iverilog/veriuser.h
+include/iverilog/vpi_user.h
+lib/ivl/
+@bin lib/ivl/cadpli.vpl
+lib/ivl/include/
+lib/ivl/include/constants.vams
+lib/ivl/include/disciplines.vams
+@bin lib/ivl/ivl
+@bin lib/ivl/ivlpp
+lib/ivl/null-s.conf
+lib/ivl/null.conf
+@bin lib/ivl/null.tgt
+lib/ivl/stub-s.conf
+lib/ivl/stub.conf
+@bin lib/ivl/stub.tgt
+lib/ivl/system.sft
+@bin lib/ivl/system.vpi
+lib/ivl/v2005_math.sft
+@bin lib/ivl/v2005_math.vpi
+lib/ivl/va_math.sft
+@bin lib/ivl/va_math.vpi
+lib/ivl/vhdl-s.conf
+lib/ivl/vhdl.conf
+@bin lib/ivl/vhdl.tgt
+lib/ivl/vvp-s.conf
+lib/ivl/vvp.conf
+@bin lib/ivl/vvp.tgt
+lib/libveriuser.a
+lib/libvpi.a
+@man man/man1/iverilog-vpi.1
+@man man/man1/iverilog.1
+@man man/man1/vvp.1
+share/doc/iverilog/
+@comment share/doc/iverilog/BUGS.txt
+share/doc/iverilog/QUICK_START.txt
+share/doc/iverilog/README.txt
+share/doc/iverilog/attributes.txt
+@comment share/doc/iverilog/cygwin.txt
+share/doc/iverilog/developer-quick-start.txt
+share/doc/iverilog/extensions.txt
+share/doc/iverilog/glossary.txt
+share/doc/iverilog/ieee1364-notes.txt
+share/doc/iverilog/ivl_target.txt
+share/doc/iverilog/ivlpp/
+share/doc/iverilog/ivlpp/ivlpp.txt
+share/doc/iverilog/lpm.txt
+@comment share/doc/iverilog/macosx.txt
+@comment share/doc/iverilog/mingw.txt
+share/doc/iverilog/netlist.txt
+share/doc/iverilog/swift.txt
+share/doc/iverilog/t-dll.txt
+share/doc/iverilog/va_math.txt
+share/doc/iverilog/vpi.txt
+share/doc/iverilog/vvp/
+share/doc/iverilog/vvp/README.txt
+share/doc/iverilog/vvp/opcodes.txt
+share/doc/iverilog/xilinx-hint.txt