2 ExternalFile applicationType IVERILOG Label vga_timing_gen externalInputs i_pclk,i_rst externalOutputs o_row:11,o_col:11,o_start,o_step,o_hsync,o_vsync Width 8 CodeFile /Users/car/Projects/hope/vga_timing_gen.sv Clock Frequency 50000 runRealTime true Button VGA Const Const Const Counter Bits 16 Probe Const Const Value 0 Probe