Since integration seems to be proceeding well, started documenting some of the circuits via schematic (KiCad).
This commit is contained in:
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342
Schematics/IO_Board/IO_Board-cache.lib
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342
Schematics/IO_Board/IO_Board-cache.lib
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# Amplifier_Operational_LM324A
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#
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DEF Amplifier_Operational_LM324A U 0 5 Y Y 5 L N
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F0 "U" 0 200 50 H V L CNN
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F1 "Amplifier_Operational_LM324A" 0 -200 50 H V L CNN
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F2 "" -50 100 50 H I C CNN
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F3 "" 50 200 50 H I C CNN
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ALIAS LM324 TLC274 TLC279 TL074 LM324A MCP6004 TL084 TL064 LMV324 LMC6484 MCP604 MC33079 MC33174 MC33179 OPA1604 OPA1679 OPA4134 OPA4340UA OPA4376 MCP6L94 TSV914 ADA4807-4 TSV994
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$FPLIST
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SOIC*3.9x8.7mm*P1.27mm*
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DIP*W7.62mm*
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TSSOP*4.4x5mm*P0.65mm*
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SSOP*5.3x6.2mm*P0.65mm*
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MSOP*3x3mm*P0.5mm*
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$ENDFPLIST
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DRAW
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P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 4 3 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 4 4 1 10 -200 200 200 0 -200 -200 -200 200 f
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X ~ 1 300 0 100 L 50 50 1 1 O
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X - 2 -300 -100 100 R 50 50 1 1 I
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X + 3 -300 100 100 R 50 50 1 1 I
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X + 5 -300 100 100 R 50 50 2 1 I
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X - 6 -300 -100 100 R 50 50 2 1 I
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X ~ 7 300 0 100 L 50 50 2 1 O
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X + 10 -300 100 100 R 50 50 3 1 I
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X ~ 8 300 0 100 L 50 50 3 1 O
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X - 9 -300 -100 100 R 50 50 3 1 I
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X + 12 -300 100 100 R 50 50 4 1 I
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X - 13 -300 -100 100 R 50 50 4 1 I
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X ~ 14 300 0 100 L 50 50 4 1 O
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X V- 11 -100 -300 150 U 50 50 5 1 W
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X V+ 4 -100 300 150 D 50 50 5 1 W
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ENDDRAW
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ENDDEF
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#
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# Amplifier_Operational_LM358
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#
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DEF Amplifier_Operational_LM358 U 0 5 Y Y 3 L N
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F0 "U" 0 200 50 H V L CNN
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F1 "Amplifier_Operational_LM358" 0 -200 50 H V L CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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SOIC*3.9x4.9mm*P1.27mm*
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DIP*W7.62mm*
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TO*99*
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OnSemi*Micro8*
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TSSOP*3x3mm*P0.65mm*
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TSSOP*4.4x3mm*P0.65mm*
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MSOP*3x3mm*P0.65mm*
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SSOP*3.9x4.9mm*P0.635mm*
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LFCSP*2x2mm*P0.5mm*
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*SIP*
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SOIC*5.3x6.2mm*P1.27mm*
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$ENDFPLIST
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DRAW
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P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f
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X ~ 1 300 0 100 L 50 50 1 1 O
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X - 2 -300 -100 100 R 50 50 1 1 I
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X + 3 -300 100 100 R 50 50 1 1 I
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X + 5 -300 100 100 R 50 50 2 1 I
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X - 6 -300 -100 100 R 50 50 2 1 I
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X ~ 7 300 0 100 L 50 50 2 1 O
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X V- 4 -100 -300 150 U 50 50 3 1 W
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X V+ 8 -100 300 150 D 50 50 3 1 W
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ENDDRAW
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ENDDEF
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#
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# Amplifier_Operational_TL072
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#
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DEF Amplifier_Operational_TL072 U 0 5 Y Y 3 L N
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F0 "U" 0 200 50 H V L CNN
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F1 "Amplifier_Operational_TL072" 0 -200 50 H V L CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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ALIAS LM358 AD8620 LMC6062 LMC6082 TL062 TL072 TL082 NE5532 SA5532 RC4558 RC4560 RC4580 LMV358 TS912 TSV912IDT TSV912IST TLC272 TLC277 MCP602 OPA1678 OPA2134 OPA2340 OPA2376xxD OPA2376xxDGK MC33078 MC33178 LM4562 OP249 OP275 ADA4075-2 MCP6002-xP MCP6002-xSN MCP6002-xMS LM7332 OPA2333xxD OPA2333xxDGK LMC6482 LT1492 LTC6081xMS8 LM6172 MCP6L92 NJM2043 NJM2114 NJM4556A NJM4558 NJM4559 NJM4560 NJM4580 NJM5532 ADA4807-2ARM OPA2691 LT6234 OPA2356xxD OPA2356xxDGK OPA1612AxD MC33172 OPA1602 TLV2372 LT6237 OPA2277
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$FPLIST
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SOIC*3.9x4.9mm*P1.27mm*
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DIP*W7.62mm*
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TO*99*
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OnSemi*Micro8*
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TSSOP*3x3mm*P0.65mm*
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TSSOP*4.4x3mm*P0.65mm*
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MSOP*3x3mm*P0.65mm*
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SSOP*3.9x4.9mm*P0.635mm*
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LFCSP*2x2mm*P0.5mm*
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*SIP*
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SOIC*5.3x6.2mm*P1.27mm*
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$ENDFPLIST
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DRAW
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P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f
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X ~ 1 300 0 100 L 50 50 1 1 O
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X - 2 -300 -100 100 R 50 50 1 1 I
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X + 3 -300 100 100 R 50 50 1 1 I
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X + 5 -300 100 100 R 50 50 2 1 I
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X - 6 -300 -100 100 R 50 50 2 1 I
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X ~ 7 300 0 100 L 50 50 2 1 O
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X V- 4 -100 -300 150 U 50 50 3 1 W
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X V+ 8 -100 300 150 D 50 50 3 1 W
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ENDDRAW
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ENDDEF
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#
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# Connector_Conn_01x02_Male
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#
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DEF Connector_Conn_01x02_Male J 0 40 Y N 1 F N
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F0 "J" 0 100 50 H V C CNN
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F1 "Connector_Conn_01x02_Male" 0 -200 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_1x??_*
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$ENDFPLIST
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DRAW
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S 34 -95 0 -105 1 1 6 F
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S 34 5 0 -5 1 1 6 F
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P 2 1 1 6 50 -100 34 -100 N
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P 2 1 1 6 50 0 34 0 N
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X Pin_1 1 200 0 150 L 50 50 1 1 P
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X Pin_2 2 200 -100 150 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Connector_Conn_01x03_Male
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#
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DEF Connector_Conn_01x03_Male J 0 40 Y N 1 F N
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F0 "J" 0 200 50 H V C CNN
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F1 "Connector_Conn_01x03_Male" 0 -200 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_1x??_*
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$ENDFPLIST
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DRAW
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S 34 -95 0 -105 1 1 6 F
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S 34 5 0 -5 1 1 6 F
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S 34 105 0 95 1 1 6 F
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P 2 1 1 6 50 -100 34 -100 N
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P 2 1 1 6 50 0 34 0 N
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P 2 1 1 6 50 100 34 100 N
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X Pin_1 1 200 100 150 L 50 50 1 1 P
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X Pin_2 2 200 0 150 L 50 50 1 1 P
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X Pin_3 3 200 -100 150 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Connector_Conn_01x06_Male
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#
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DEF Connector_Conn_01x06_Male J 0 40 Y N 1 F N
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F0 "J" 0 300 50 H V C CNN
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F1 "Connector_Conn_01x06_Male" 0 -400 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_1x??_*
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$ENDFPLIST
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DRAW
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S 34 -295 0 -305 1 1 6 F
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S 34 -195 0 -205 1 1 6 F
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S 34 -95 0 -105 1 1 6 F
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S 34 5 0 -5 1 1 6 F
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S 34 105 0 95 1 1 6 F
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S 34 205 0 195 1 1 6 F
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P 2 1 1 6 50 -300 34 -300 N
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P 2 1 1 6 50 -200 34 -200 N
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P 2 1 1 6 50 -100 34 -100 N
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P 2 1 1 6 50 0 34 0 N
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P 2 1 1 6 50 100 34 100 N
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P 2 1 1 6 50 200 34 200 N
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X Pin_1 1 200 200 150 L 50 50 1 1 P
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X Pin_2 2 200 100 150 L 50 50 1 1 P
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X Pin_3 3 200 0 150 L 50 50 1 1 P
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X Pin_4 4 200 -100 150 L 50 50 1 1 P
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X Pin_5 5 200 -200 150 L 50 50 1 1 P
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X Pin_6 6 200 -300 150 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_C
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#
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DEF Device_C C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "Device_C" 25 -100 50 H V L CNN
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F2 "" 38 -150 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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C_*
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$ENDFPLIST
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DRAW
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P 2 0 1 20 -80 -30 80 -30 N
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P 2 0 1 20 -80 30 80 30 N
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X ~ 1 0 150 110 D 50 50 1 1 P
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X ~ 2 0 -150 110 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_CP1
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#
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DEF Device_CP1 C 0 10 N N 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "Device_CP1" 25 -100 50 H V L CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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CP_*
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$ENDFPLIST
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DRAW
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A 0 -150 128 1287 513 0 1 20 N -80 -50 80 -50
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P 2 0 1 20 -80 30 80 30 N
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P 2 0 1 0 -70 90 -30 90 N
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P 2 0 1 0 -50 70 -50 110 N
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X ~ 1 0 150 110 D 50 50 1 1 P
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X ~ 2 0 -150 130 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_D
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#
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DEF Device_D D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "Device_D" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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TO-???*
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*_Diode_*
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*SingleDiode*
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D_*
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$ENDFPLIST
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DRAW
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P 2 0 1 8 -50 50 -50 -50 N
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P 2 0 1 0 50 0 -50 0 N
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P 4 0 1 8 50 50 50 -50 -50 0 50 50 N
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X K 1 -150 0 100 R 50 50 1 1 P
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X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_R_POT_US
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#
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DEF Device_R_POT_US RV 0 40 Y N 1 F N
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F0 "RV" -175 0 50 V V C CNN
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F1 "Device_R_POT_US" -100 0 50 V V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Potentiometer*
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$ENDFPLIST
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DRAW
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P 2 0 1 0 0 -90 0 -100 N
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P 2 0 1 0 0 100 0 90 N
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P 2 0 1 0 100 0 60 0 N
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P 4 0 1 0 45 0 90 20 90 -20 45 0 F
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P 5 0 1 0 0 -30 40 -45 0 -60 -40 -75 0 -90 N
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P 5 0 1 0 0 30 40 15 0 0 -40 -15 0 -30 N
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P 5 0 1 0 0 90 40 75 0 60 -40 45 0 30 N
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X 1 1 0 150 50 D 50 50 1 1 P
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X 2 2 150 0 50 L 50 50 1 1 P
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X 3 3 0 -150 50 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_R_US
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#
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DEF Device_R_US R 0 0 N Y 1 F N
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F0 "R" 100 0 50 V V C CNN
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F1 "Device_R_US" -100 0 50 V V C CNN
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F2 "" 40 -10 50 V I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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R_*
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$ENDFPLIST
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DRAW
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P 2 0 1 0 0 -90 0 -100 N
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P 2 0 1 0 0 90 0 100 N
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P 5 0 1 0 0 -30 40 -45 0 -60 -40 -75 0 -90 N
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P 5 0 1 0 0 30 40 15 0 0 -40 -15 0 -30 N
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P 5 0 1 0 0 90 40 75 0 60 -40 45 0 30 N
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X ~ 1 0 150 50 D 50 50 1 1 P
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X ~ 2 0 -150 50 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Transistor_BJT_PN2222A
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#
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DEF Transistor_BJT_PN2222A Q 0 0 Y N 1 F N
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F0 "Q" 200 75 50 H V L CNN
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F1 "Transistor_BJT_PN2222A" 200 0 50 H V L CNN
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F2 "Package_TO_SOT_THT:TO-92_Inline" 200 -75 50 H I L CIN
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F3 "" 0 0 50 H I L CNN
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$FPLIST
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TO?92*
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$ENDFPLIST
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DRAW
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C 50 0 111 0 1 10 N
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P 2 0 1 0 0 0 25 0 N
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P 2 0 1 0 100 -100 25 -25 N
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P 2 0 1 0 100 100 25 25 N
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P 3 0 1 20 25 75 25 -75 25 -75 N
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P 3 0 1 0 95 -95 75 -75 75 -75 N
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P 5 0 1 0 45 -65 65 -45 85 -85 45 -65 45 -65 F
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X E 1 100 -200 100 U 50 50 1 1 P
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X B 2 -200 0 200 R 50 50 1 1 I
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X C 3 100 200 100 D 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# power_+5V
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#
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DEF power_+5V #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -150 50 H I C CNN
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F1 "power_+5V" 0 140 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 2 0 1 0 -30 50 0 100 N
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P 2 0 1 0 0 0 0 100 N
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P 2 0 1 0 0 100 30 50 N
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X +5V 1 0 0 0 U 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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# power_GND
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#
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DEF power_GND #PWR 0 0 Y Y 1 F P
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F0 "#PWR" 0 -250 50 H I C CNN
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F1 "power_GND" 0 -150 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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DRAW
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P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
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X GND 1 0 0 0 D 50 50 1 1 W N
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ENDDRAW
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ENDDEF
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#
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#End Library
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1
Schematics/IO_Board/IO_Board.kicad_pcb
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1
Schematics/IO_Board/IO_Board.kicad_pcb
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(kicad_pcb (version 4) (host kicad "dummy file") )
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Schematics/IO_Board/IO_Board.pro
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33
Schematics/IO_Board/IO_Board.pro
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update=22/05/2015 07:44:53
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version=1
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last_client=kicad
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[general]
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version=1
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RootSch=
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BoardNm=
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[pcbnew]
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version=1
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LastNetListRead=
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UseCmpFile=1
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PadDrill=0.600000000000
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PadDrillOvalY=0.600000000000
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PadSizeH=1.500000000000
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PadSizeV=1.500000000000
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PcbTextSizeV=1.500000000000
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PcbTextSizeH=1.500000000000
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PcbTextThickness=0.300000000000
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ModuleTextSizeV=1.000000000000
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ModuleTextSizeH=1.000000000000
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ModuleTextSizeThickness=0.150000000000
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SolderMaskClearance=0.000000000000
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SolderMaskMinWidth=0.000000000000
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DrawSegmentWidth=0.200000000000
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BoardOutlineThickness=0.100000000000
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ModuleOutlineThickness=0.150000000000
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[cvpcb]
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version=1
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NetIExt=net
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[eeschema]
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version=1
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LibDir=
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[eeschema/libraries]
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1105
Schematics/IO_Board/IO_Board.sch
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1105
Schematics/IO_Board/IO_Board.sch
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File diff suppressed because it is too large
Load Diff
1103
Schematics/IO_Board/IO_Board.sch-bak
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1103
Schematics/IO_Board/IO_Board.sch-bak
Normal file
File diff suppressed because it is too large
Load Diff
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