Maciej Wieczor-Retman dc172d3f82 insns: travis: apx: APX support fo atomic instructions ...

Add the AOR instruction and use $bwdq macros on the other new atomic
instructions: AADD, AAND and AXOR.

Add tests.

Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>

2025-09-04 08:40:28 +02:00

..

bytecode.txt

assemble: rex2.w; hinted Jcc in 64-bit mode; UDB

2025-08-29 13:55:30 -07:00

iflags.ph

disasm: handle NOP disassembly, remove debug message

2025-09-02 20:01:36 -07:00

insns-iflags.ph

insns: add PROT flag if either EVEX or LONG is set

2024-08-23 13:15:46 -07:00

insns.dat

insns: travis: apx: APX support fo atomic instructions

2025-09-04 08:40:28 +02:00

insns.pl

More KMOV pattern fixes

2025-09-02 21:09:20 -07:00

preinsns.pl

x86: Immediate operand longer than byte not possible

2025-09-04 08:40:28 +02:00

regs.dat

ndisasm: make the assembler (hopefully) work again

2025-08-30 16:16:43 -07:00

regs.pl

ndisasm: make the assembler (hopefully) work again

2025-08-30 16:16:43 -07:00

rex2.pl

x86: add Perl script for rex2 compatibility testing (not yet used)

2025-03-04 08:43:09 -08:00

x86const.h

apx: modify the tokenizer to be able to handle {dfv=...}

2024-07-27 17:57:08 -07:00