mirror of
https://github.com/netwide-assembler/nasm.git
synced 2025-11-08 23:27:15 -05:00
a7457e66cf
Matching of branch instructions with prefixes and sizes is, to say the least, tricky. Work through it, and add a new macro to help. Fixes: https://github.com/netwide-assembler/nasm/issues/144 Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
661 lines
17 KiB
Perl
Executable File
661 lines
17 KiB
Perl
Executable File
#!/usr/bin/perl
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#
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# Preprocess the instruction pattern file.
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#
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# Generate some common repeated patterns here.
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#
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# Tag instructions which set the flags, and tag instructions
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# which already do upper-zeroing.
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#
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# This can also be used to create other implied flags.
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#
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use integer;
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use strict;
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require 'x86/insns-iflags.ph';
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our %macros;
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our($macro, $outfile, $infile, $line); # Public for error messages
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# Common pattern for the basic 7 arithmetric functions
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$macros{'arith'} = {
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'def' => *def_eightfold,
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'txt' => <<'EOL'
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$$bwdq $op rm#,reg# [mr: $hle o# $00# /r ] 8086,FL,SM,$lock
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$$bwdq $op reg#,rm# [rm: o# $02# /r ] 8086,FL,SM
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$$wdq $op rm#,sbyte# [mi: $hle o# 83 /$n ib,s ] 8086,FL,SM,$lock
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$$bwdq $op ax#,imm# [-i: o# $04# i# ] 8086,FL,SM
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$$bwdq $op rm#,imm# [mi: $hle o# 80# /$n i# ] 8086,FL,SM,$lock
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$$bwdq $op reg#?,reg#,rm# [vrm: evex.ndx.$nf.l0.m4.o# $02# /r ] $evex,FL,APX,SM
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$$bwdq $op reg#?,rm#,reg# [vmr: evex.ndx.$nf.l0.m4.o# $00# /r ] $evex,FL,APX,SM
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$$wdq $op reg#?,rm#,sbyte# [vmi: evex.ndx.$nf.l0.m4.o# 83 /$n ib,s ] $evex,FL,APX,SM
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$$bwdq $op reg#?,rm#,imm# [vmi: evex.ndx.$nf.l0.m4.o# 80# /$n i# ] $evex,FL,APX,SM
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EOL
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};
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# Common pattern for the basic shift and rotate instructions
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# Separate legacy and EVEX versions because additional patterns are
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# needed to handle the -X VEX versions
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$macros{'shift'} = {
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'def' => *def_eightfold,
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'txt' => <<'EOL'
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$$bwdq $op rm#,unity [m-: o# d0# /$n] ] 8086,FL
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$$bwdq $op rm#,reg_cl [m-: o# d2# /$n] ] 8086,FL
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$$bwdq $op rm#,reg_cx [m-: o# d2# /$n] ] 8086,FL,ND
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$$bwdq $op rm#,reg_ecx [m-: o# d2# /$n] ] 8086,FL,ND
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$$bwdq $op rm#,reg_rcx [m-: o# d2# /$n] ] 8086,FL,ND
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$$bwdq $op rm#,imm8 [mi: o# c0# /$n ib,u] ] 186,FL
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EOL
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};
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# APX EVEX versions
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$macros{'eshift'} = {
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'def' => *def_eightfold,
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'txt' => <<'EOL'
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$$bwdq $op reg#?,rm#,unity [vm-: evex.ndx.nf.l0.m4.o# d0# /$n ] $apx,FL,SM0-1
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$$bwdq $op reg#?,rm#,reg_cl [vm-: evex.ndx.nf.l0.m4.o# d2# /$n ] $apx,FL,SM0-1
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$$bwdq $op reg#?,rm#,reg_cx [vm-: evex.ndx.nf.l0.m4.o# d2# /$n ] $apx,FL,SM0-1,ND
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$$bwdq $op reg#?,rm#,reg_ecx [vm-: evex.ndx.nf.l0.m4.o# d2# /$n ] $apx,FL,SM0-1,ND
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$$bwdq $op reg#?,rm#,reg_rcx [vm-: evex.ndx.nf.l0.m4.o# d2# /$n ] $apx,FL,SM0-1,ND
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$$bwdq $op reg#?,rm#,imm8 [vmi: evex.ndx.nf.l0.m4.o# c0# /$n ib,u ] $apx,FL,SM0-1
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EOL
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};
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# -X shifts
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$macros{'xshift'} = {
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'func' => sub {
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my($mac, $args, $rawargs) = @_;
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my @ol;
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my $vex = 'vex';
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my $vfl = '';
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if (grep { /^evex=1$/ } @$rawargs) {
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$vex = 'evex';
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$vfl = 'APX';
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}
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foreach my $xf (['X',"$vfl"], ['', "$vfl,ND,NF!,OPT"]) {
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my($x,$fl) = @$xf;
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foreach my $os (32, 64) {
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my $w = ($os eq 32) ? 'w0' : 'w1';
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my $ixor = sprintf('%02x', $os-1);
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push(@ol, "ROR$x reg$os,rm$os,imm8 [rmi: $vex.lz.f2.0f3a.$w f0 /r ib] BMI2,SM0-1,!FL,$fl");
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push(@ol, "ROL$x reg$os,rm$os,imm_known8 [rmi: $vex.lz.f2.0f3a.$w f0 /r ib^$ixor] BMI2,SM0-1,!FL,$fl");
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foreach my $ss (8, 16, 32, 64) {
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foreach my $opp (['SHL','66'], ['SAL','66'], ['SAR','f3'], ['SHR','f2']) {
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my($op,$pp) = @$opp;
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my $ndss = ',ND' unless ($ss == $os && $op ne 'SAL');
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push(@ol, "$op$x reg$os,rm${os}*,reg$ss [rmv: $vex.lz.$pp.0f38.$w f7 /r] BMI2,SM0-1,!FL,$fl,$ndss");
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}
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}
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}
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}
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return @ol;
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}
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};
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#
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# Common pattern for multiple 32/64, 16/32/64, or 8/16/32/64 instructions.
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# 'z' is used for a null-prefixed default-sized instruction (osm/osd)
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#
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my @sizename = ('z', 'b', 'w', 'd', 'q');
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for (my $i = 1; $i <= 31; $i++) {
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my $n;
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for (my $j = 0; $j < scalar @sizename; $j++) {
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$n .= $sizename[$j] if ($i & (1 << $j));
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}
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$macros{$n} = { 'func' => *func_multisize, 'mask' => $i };
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}
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sub func_multisize($$$) {
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my($mac, $args, $rawargs) = @_;
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my @sbyte = ('imm8', 'imm8', 'sbyteword16', 'sbytedword32', 'sbytedword64');
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my $long = 0; # 1 for LONG, 2 for NOLONG, 3 for invalid
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my $wwflag = 0;
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my @ol;
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my $mask = $mac->{'mask'};
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for (my $i = 0; $i < scalar(@sizename); $i++) {
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next unless ($mask & (1 << $i));
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my $s = ($i > 0) ? 4 << $i : '';
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my $sn = $sizename[$i];
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my $sz = $s || 'sm';
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my $o;
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my $ins = join(' ', @$rawargs);
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my $nd = 0;
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# Conditional pattern inclusions
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# Syntax: (which1:text1/which2:text2/text3)
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# ... where "which" is a combination of sizename letters.
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# No colon means unconditional ("else" clause)
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while ($ins =~ /^(.*?)\(([^\)]+)\)(.*)$/) {
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$o .= $1;
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my @cpp = split(/\//, $2);
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$ins = $3;
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my $found;
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foreach my $cp (@cpp) {
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if ($cp =~ /^([a-z]+)\:(.*)$/) {
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$cp = $2;
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$found = $1 =~ /$sn/;
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} else {
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$found = 1;
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}
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if ($found) {
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$o .= $cp;
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last;
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}
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}
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}
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$ins = $o.$ins;
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$o = '';
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while ($ins =~ /^(.*?)((?:\b[0-9a-f]{2}(?:\+r)?|\bsbyte|\bimm|\bsel|\bopt\w?|\b[ioa]d?|\b(?:reg_)?[abcd]x|\bk?reg|\bk?rm|\bw|\bS\b)?\#{1,2}|\b(?:reg|rm)64\b|\b(?:o64)?nw\b|\b(?:NO)?LONG\w+\b|\%{1,2}|[ABCD]X\#)(.*)$/) {
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$o .= $1;
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my $mw = $2;
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$ins = $3;
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if ($mw eq '%') {
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$o .= uc($sn) if ($i);
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} elsif ($mw eq '%%') {
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if ($i < 2) {
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die "$0:$infile:$line: $mw cannot be used with z|b\n";
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}
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$o .= uc($sizename[$i-1]) . uc($sn);
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} elsif ($mw =~ /^([0-9a-f]{2})(\+r)?(\#)?\#$/) {
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my $n;
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$n = ($3 ne '') ? $s > 16 : $s > 8;
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$n <<= 3 if ($2 ne '');
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$o .= sprintf('%02x%s', hex($1) | $n, $2);
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} elsif ($mw eq 'sbyte#') {
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$o .= $sbyte[$i];
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} elsif ($mw =~ /^imm\#(\#?)$/) {
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$o .= (($1 eq '' && $s >= 64) ? 'sdword' : 'imm').$s;
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} elsif ($mw =~ '^([ao])(d?)\#$') {
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$o .= $1.("$2$sz" eq 'dsm' ? 'df' : $sz);
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} elsif ($mw eq 'i#') {
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$o .= !$i ? 'iwd' : ($s >= 64) ? 'id,s' : "i$sn";
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} elsif ($mw eq 'i##') {
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$o .= !$i ? 'iwdq' : "i$sn";
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} elsif ($mw =~ /^(?:reg_)?([abcd])x\#$/i) {
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my $rl = $1;
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my $upr = ($rl =~ /^[A-Z]/);
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if ($i == 1) {
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$o .= $upr ? "${rl}L" : "reg_${rl}l";
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} elsif ($i == 2) {
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$o .= $upr ? "${rl}X" : "reg_${rl}x";
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} elsif ($i == 3) {
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$o .= $upr ? "E${rl}X" : "reg_e${rl}x";
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} elsif ($i == 4) {
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$o .= $upr ? "R${rl}X" : "reg_r${rl}x";
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$long |= 1;
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} else {
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die "$0:$infile:$line: register cannot be used with z\n";
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}
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} elsif ($mw eq 'sel#') {
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# z is (ab)used to mean the memory form of a segment selector
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if ($i == 0) {
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$o .= 'mem16';
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} elsif ($i == 1) {
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die "$0:$infile:$line: $mw cannot be used with b\n";
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} else {
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$o .= "reg$s";
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}
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} elsif ($mw =~ /^opt(\w?)\#$/) {
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if ($i >= 2) {
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my $opt .= $1 eq '' ? "opt$sn" : "opt$1";
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if (!($opt eq 'optd' && $s == 16) && $opt ne 'optq') {
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$o .= $opt.' ';
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}
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}
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$o .= "o$s" if ($s > 0);
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} elsif ($mw =~ /^(o64)?nw$/) {
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$long |= 2 if ($i == 32); # nw = 32 bits not encodable in long mode
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$o .= $mw;
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} elsif ($mw =~ /^((k?)(?:reg|rm))(\#{1,2}|[0-9]+)$/) {
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# (Possible) GPR reference
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$o .= $1;
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my $isk = $2;
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my $n = $3;
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if ($n eq '#') {
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$n = $s;
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} elsif ($n eq '##') {
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$n = $s >> 1;
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}
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$o .= $n;
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# 64-bit K registers OK in 32-bit mode
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$long |= 1 if ($n >= 64 && !$isk);
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} elsif ($mw =~ /^(NO)?LONG(\w+)$/) {
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my $longflag = $1 ? 2 : 1;
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$long |= $longflag if ($2 =~ /$sn/i);
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# Drop
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} elsif ($mw eq 'w#') {
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if (!$i) {
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$o .= 'ww';
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$wwflag = 1;
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} else {
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$o .= ($s >= 64) ? 'w1' : 'w0';
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}
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} elsif ($mw eq 'w##') {
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$o .= 'w'.(($i-1) & 1);
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} elsif ($mw eq 'S#') {
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$o .= 'S'
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} elsif ($mw eq '#') {
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$o .= $s;
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} else {
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die "$0:$infile:$line: unknown or invalid sequence \"$mw\"\n";
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}
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}
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$o .= $ins;
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$o .= ',WW' if ($wwflag);
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$o .= ',LONG' if ($long & 1);
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$o .= ',NOLONG' if ($long & 2);
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$o .= ',ND' if ($nd);
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if ($s >= 32 && $o !~ /\B\!386\b/ && $o =~ /\b(8086|[12]86)\b/) {
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$o .= ',386';
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}
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push(@ol, $o);
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}
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return @ol;
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}
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# Near branch operand size patterns
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# This allows the "normal" size patterns to be used for
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# address size features, as used by JCXZ and LOOP.
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# This also allows the syntax "jmp dword foo" in 64-bit
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# mode, even though it is really bogus.
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$macros{'br'} = {
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'func' =>
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sub {
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my($mac, $args, $rawargs) = @_;
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my @ol;
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my $ins = join(' ', @$rawargs);
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foreach my $wx ([16,16], [32,32], [64,64], [64,32]) {
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my($w,$iw,$sz) = @$wx;
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my $i = $ins;
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my $argn;
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if ($i =~ /^(.*)\b(near|short)\b/) {
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my $what = $2;
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next if ($what eq 'short' && $iw != $w);
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(my $argn = $1) =~ s/[^,:]+//g;
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$argn = 'AR'.length($argn);
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}
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$i =~ s/\b(near|short)\b/imm$iw|$1/;
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$i =~ s/\bos\b/nw o$w/;
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$i .= ",$argn";
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$i .= ($iw != $w) ? ',SX,ND' : ',OSIZE';
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$i .= ($w == 64) ? ',LONG' : ',NOLONG';
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push(@ol, $i);
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}
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return(@ol);
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}
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};
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# Common pattern for K-register instructions
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$macros{'k'} = {
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'func' =>
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sub {
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my($mac, $args, $rawargs) = @_;
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my @ol;
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my $ins = join(' ', @$rawargs);
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my $xins;
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my $n;
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$ins .= ',ZU';
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($xins = $ins) =~ s/\bSM[0-9-]*,?//;
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push(@ol, $xins);
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($xins = $ins) =~ s/\%//;
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push(@ol, $xins);
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if ($xins =~ s/\%//) {
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push(@ol, $xins);
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}
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# Allow instruction without K, as long as they aren't "TEST"
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if ($ins !~ /^\bK\w*TEST/) {
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my @on;
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foreach my $oi (@ol) {
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# Remove first capital K
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($xins = $oi) =~ s/\bK//;
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push(@on, $xins);
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}
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push(@ol, @on);
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}
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# Allow SHIFT -> SH
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if ($ins =~ /SHIFT/) {
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my @on;
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foreach my $oi (@ol) {
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# Remove first capital K
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($xins = $oi) =~ s/SHIFT/SH/;
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push(@on, $xins);
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}
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push(@ol, @on);
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}
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# All instruction patterns except the first are ND
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for (my $i = 1; $i < scalar(@ol); $i++) {
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$ol[$i] .= ',ND';
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}
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return(@ol);
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}
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};
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# Common pattern for the HINT_NOPx pseudo-instructions
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$macros{'hint_nops'} = {
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'func' =>
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sub {
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my($mac, $args, $rawargs) = @_;
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my @ol;
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for (my $i = 0; $i < 64; $i++) {
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push(@ol,
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sprintf("\$wdq HINT_NOP%d\trm#\t[m: o# 0f %02x /%d]\tP6,UNDOC,ND",
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$i, 0x18+($i >> 3), $i & 7));
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}
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return @ol;
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}
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};
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#
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# Macro helper functions for common constructs
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#
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# Parse arguments handling variable setting
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sub parse_args($@) {
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my $uvars = shift(@_);
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my %initvars = defined($uvars) ? %$uvars : ();
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my @oa;
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my $n = 0; # Argument counter
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foreach my $ops (@_) {
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my %vars = %initvars;
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$vars{'n'} = $n;
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$vars{'nd'} = 0;
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my @oaa;
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my $is_op;
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foreach my $op ($ops =~ /(?:[^\,\[\]\"]+|\[.*?\]|\".*?\")+/g) {
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$op =~ s/\"//g;
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$vars{'nd'} = 'nd' if ($op =~ s/^\@//);
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if ($op =~ /^(\w+)\=(.*)$/) {
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$vars{$1} = $2;
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next;
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} elsif ($op =~ /^([\!\+\-])(\w+)$/) {
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# The commas around KILL guarantees that it is a separate token
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$vars{$2} =
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($1 eq '+') ? $2 :
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($1 eq '!') ? ',KILL,' :
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'';
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next;
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} elsif ($op =~ /^\-?$/) {
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# Null (placeholder) operand
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$is_op = 1;
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next;
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}
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$vars{'op'} = $op;
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push(@oaa, {%vars});
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$vars{'nd'} = 'nd';
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$is_op = 1;
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}
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if ($is_op) {
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push(@oa, [@oaa]);
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$n++;
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} else {
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# Global variable setting
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%initvars = %vars;
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}
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}
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return @oa;
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}
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# "8-fold" or similar sequential instruction patterns
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sub def_eightfold($$$) {
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my($var, $arg, $mac) = @_;
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my $shift = $arg->{'shift'};
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$shift = 3 unless (defined($shift));
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if ($var =~ /^[0-9a-f]{1,2}$/) {
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return sprintf('%02x', hex($var) + ($arg->{'n'} << $shift));
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} else {
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return $var;
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}
|
|
}
|
|
|
|
#
|
|
# Substitute variables in a pattern
|
|
#
|
|
sub substitute($$;$) {
|
|
my($pat, $vars, $defs) = @_;
|
|
my $o = '';
|
|
my $def;
|
|
my @defargs;
|
|
|
|
if (defined($defs)) {
|
|
@defargs = @$defs;
|
|
$def = shift(@defargs);
|
|
}
|
|
|
|
while ($pat =~ /^(.*?)\$(?:(\w+\b|\$+)|\{(\w+|\$+)\})(.*)$/s) {
|
|
$o .= $1;
|
|
$pat = $4;
|
|
my $vn = $2.$3;
|
|
my $vv;
|
|
if ($vn =~ /^\$/) {
|
|
$vv = $vn; # Reduce by one $
|
|
} else {
|
|
$vv = $vars->{$vn};
|
|
if (!defined($vv)) {
|
|
if (defined($def)) {
|
|
$vv = $def->($vn, @defargs);
|
|
}
|
|
$vv = $vn unless(defined($vv));
|
|
}
|
|
}
|
|
$vv =~ s/\s+$// if ($pat =~ /^\s/);
|
|
$o .= $vv;
|
|
}
|
|
$o .= $pat;
|
|
|
|
return $o;
|
|
}
|
|
|
|
#
|
|
# Build output by substituting the variables for each argument,
|
|
#
|
|
sub subst_list($$;$$) {
|
|
my($pat, $args, $def, $mac) = @_;
|
|
my @o = ();
|
|
|
|
foreach my $a0 (@$args) {
|
|
foreach my $arg (@$a0) {
|
|
push(@o, substitute($pat, $arg, [$def, $arg, $mac]));
|
|
}
|
|
}
|
|
|
|
return @o;
|
|
}
|
|
|
|
#
|
|
# Actually invoke a macro
|
|
#
|
|
sub process_macro(@) {
|
|
$macro = shift(@_);
|
|
my $mac = $macros{$macro};
|
|
|
|
if (!defined($mac)) {
|
|
die "$0:$infile:$line: no macro named \$$macro\n";
|
|
}
|
|
|
|
my @args = parse_args($mac->{'vars'}, @_);
|
|
my $func = $mac->{'func'};
|
|
my @o;
|
|
if (defined($func)) {
|
|
@o = $func->($mac, \@args, \@_);
|
|
} else {
|
|
@o = subst_list($mac->{'txt'}, \@args, $mac->{'def'}, $mac);
|
|
}
|
|
return map { split(/\n/, $_) } @o;
|
|
}
|
|
|
|
#
|
|
# Main program
|
|
#
|
|
($infile, $outfile) = @ARGV;
|
|
$line = 0;
|
|
|
|
## XXX: fix special case: XCHG
|
|
## XXX: check: CMPSS, CMPSD
|
|
## XXX: check VEX encoded instructions that do not write
|
|
|
|
# Instructions which (possibly) change the flags without annotations
|
|
# The FL or !FL flags will override this
|
|
my $flaggy = '^(aa[adms]|ad[dc]|ad[co]x|aes\w*kl|and|andn|arpl|bextr|bl[sc]ic?|bl[sc]msk|bl[sc]r|\
|
|
bs[rf]|bt|bt[crs]|bzhi|clac|clc|cld|cli|clrssbsy|cmc|cmp|cmpxchg.*|da[as]|dec|div|\
|
|
encodekey.*|enqcmd.*|fu?comip?|idiv|imul|inc|iret.*|kortest.*|ktest.*|lar|loadiwkey|\
|
|
lsl|[lt]zcnt|mul|neg|or|pconfig|popcnt|popf.*|r[co][lr]|rdrand|rdseed|sahf|s[ah][lr]|\
|
|
sbb|scas.*|sh[lr]d|stac|stc|std|sti|sub|test|testui|tpause|v?u?comis[sdh]|uiret|\
|
|
umwait|ver[rw]|vtestp[ps]|xadd|xor|xtest|getsec|rsm|sbb|cmps[bwdq]|hint_.*)$';
|
|
|
|
# Instructions which don't write their leftmost operand are inherently not {zu}
|
|
my $nozero = '^(jmp|call|bt|test|cmp|ud[012].*|ptwrite|tpause|u?monitor.*|u?mwait.*|incssp.*|\
|
|
enqcmds?|senduipi|hint_.*|jmpe|nop|inv.*|push2?p?|vmwrite|clzero|clflush|clwb|lkgs)$';
|
|
|
|
sub add_flag($@) {
|
|
my $flags = shift(@_);
|
|
|
|
foreach my $fl (@_) {
|
|
$flags->{$fl}++ unless ($fl =~ /^\s*$/);
|
|
}
|
|
}
|
|
|
|
sub has_flag($@) {
|
|
my $flags = shift(@_);
|
|
foreach my $fl (@_) {
|
|
return $flags->{$fl} if ($flags->{$fl});
|
|
}
|
|
return undef;
|
|
}
|
|
|
|
sub adjust_fl_zu(@) {
|
|
my($opcode, $operands, $encoding, $flags) = @_;
|
|
|
|
# Flag-changing instructions
|
|
if ($encoding =~ /\bnf\b/) {
|
|
add_flag($flags, 'NF');
|
|
}
|
|
|
|
if (!has_flag($flags, '!FL', 'NF', 'NF!')) {
|
|
add_flag($flags, 'FL') if ($opcode =~ /$flaggy/io);
|
|
}
|
|
|
|
## XXX: fix special case: XCHG
|
|
## XXX: check: CMPSS, CMPSD
|
|
## XXX: check VEX encoded instructions that do not write
|
|
|
|
# Zero-upper. This can also be used to select the AVX forms
|
|
# to clear the upper part of a vector register.
|
|
if (!$flags->{'!ZU'} &&
|
|
(($encoding =~ /\be?vex\b/ && $operands =~ /^(xyz)mm(reg|rm)/) ||
|
|
$operands =~ /^(reg_[re]([abcd]x|[sb]p|[sd]i))\b/) &&
|
|
$opcode !~ /$nozero/io) {
|
|
add_flag($flags, 'ZU');
|
|
}
|
|
|
|
return $flags;
|
|
}
|
|
|
|
sub adjust_instruction_flags(@) {
|
|
my @i = @_;
|
|
|
|
$i[3] = adjust_fl_zu(@i);
|
|
|
|
return undef unless (defined($i[3]));
|
|
|
|
if ($i[0] =~ /\bKILL\b/ || $i[1] =~ /\bKILL\b/ ||
|
|
$i[2] =~ /\bKILL\b/ || has_flag($i[3], 'KILL')) {
|
|
return undef;
|
|
}
|
|
|
|
if ($i[2] =~ /\b(a16|rex\.l)\b/) {
|
|
add_flag($i[3], 'NOLONG');
|
|
} elsif ($i[2] =~ /\b(o64(nw)?\b|rex2?|a64\b)/) {
|
|
add_flag($i[3], 'LONG');
|
|
}
|
|
if (has_flag($i[3], 'NOLONG') && has_flag($i[3], 'LONG')) {
|
|
# This is obviously not very useful...
|
|
return undef;
|
|
}
|
|
|
|
if (has_flag($i[3], 'LONG')) {
|
|
add_flag($i[3], 'X86_64');
|
|
}
|
|
|
|
return $i[3];
|
|
}
|
|
|
|
sub process_insn($$) {
|
|
my($out, $l) = @_;
|
|
|
|
if ($l !~ /^\s*([^\s\;]+)\s+([^\s\;]+)\s+([^\s\;]+|\[[^\;]*?\])\s+([^\s\;]+)\s*(\;.*?)?\s*$/) {
|
|
print $out $l, "\n";
|
|
return;
|
|
}
|
|
|
|
print $out $5, "\n" unless ($5 eq ''); # Comment
|
|
|
|
my $opcode = $1;
|
|
my $operands = $2;
|
|
my $encoding = $3;
|
|
my $flagstr = $4;
|
|
|
|
my $nopr = ($operands =~ /^(void|ignore)$/) ? 0 : scalar(split(/[\,\:]/, $operands));
|
|
|
|
# Modify the instruction flags
|
|
my $flags = {split_flags($flagstr)};
|
|
set_implied_flags($flags, $nopr);
|
|
|
|
$flags = adjust_instruction_flags($opcode, $operands, $encoding, $flags);
|
|
return unless (defined($flags));
|
|
$flagstr = merge_flags($flags, 1);
|
|
|
|
# Tidy up the encoding for readability
|
|
$encoding =~ s/\s+/ /g;
|
|
if ($encoding =~ /^\s*\[\s*(.*?\:)?\s*([^\:]*?)\s*\]\s*$/) {
|
|
$encoding = sprintf('[%-10s%-34s]', $1, $2);
|
|
}
|
|
|
|
print $out sprintf("%-23s %-39s %-47s %s\n", $opcode, $operands, $encoding, $flagstr);
|
|
}
|
|
|
|
open(my $in, '<', $infile) or die "$0:$infile: $!\n";
|
|
open(my $out, '>', $outfile) or die "$0:$outfile: $!\n";
|
|
|
|
|
|
while (defined(my $l = <$in>)) {
|
|
$line++;
|
|
chomp $l;
|
|
my @insi = ($l);
|
|
|
|
while (defined(my $li = shift(@insi))) {
|
|
if ($li =~ /^\s*\$(\w+[^\;]*?)\s*(\;.*)?$/) {
|
|
push(@insi, "$2\n") unless ($2 eq ''); # Retain comment
|
|
my @args = ($1 =~ /(?:\[[^\]]*\]|\"[^\"]*\"|[^\[\]\"\s])+/g);
|
|
unshift(@insi, process_macro(@args));
|
|
} else {
|
|
process_insn($out, $li);
|
|
}
|
|
}
|
|
}
|
|
|
|
close($in);
|
|
close($out);
|