mirror of
https://github.com/netwide-assembler/nasm.git
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a398a41f0a
Update AMX test per previous commit from IntLatx64. Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
118 lines
4.0 KiB
NASM
118 lines
4.0 KiB
NASM
bits 64
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%macro amx 3
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%define treg tmm %+ %1
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%define treg2 tmm %+ %2
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%define treg3 tmm %+ %3
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%define zreg zmm %+ %1
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ldtilecfg [rsi] ;AMX_TILE
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sttilecfg [rdi] ;AMX_TILE
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tilezero treg ;AMX_TILE
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tileloadd treg, [rax] ;AMX_TILE
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tileloadd treg, [rax+rdx] ;AMX_TILE
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tileloadd treg, [rax+rdx*2] ;AMX_TILE
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tileloaddt1 treg, [rax] ;AMX_TILE
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tileloaddt1 treg, [rax+rdx] ;AMX_TILE
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tileloaddt1 treg, [rax+rdx*2] ;AMX_TILE
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tileloaddrs treg, [rax] ;AMX-MOVRS
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tileloaddrs treg, [rax+rdx] ;AMX-MOVRS
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tileloaddrs treg, [rax+rdx*2] ;AMX-MOVRS
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tileloaddrst1 treg, [rax] ;AMX-MOVRS
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tileloaddrst1 treg, [rax+rdx] ;AMX-MOVRS
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tileloaddrst1 treg, [rax+rdx*2] ;AMX-MOVRS
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tdpbf16ps treg, treg2, treg3 ;AMX-BF16
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tdpbssd treg, treg2, treg3 ;AMX_INT8
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tdpbusd treg, treg2, treg3 ;AMX_INT8
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tdpbsud treg, treg2, treg3 ;AMX_INT8
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tdpbuud treg, treg2, treg3 ;AMX_INT8
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tdpfp16ps treg, treg2, treg3 ;AMX-FP16
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tcmmimfp16ps treg, treg2, treg3 ;AMX-COMPLEX
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tcmmrlfp16ps treg, treg2, treg3 ;AMX-COMPLEX
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tmmultf32ps treg, treg2, treg3 ;AMX_TF32
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tdpbf8ps treg, treg2, treg3 ;AMX-FP8
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tdpbhf8ps treg, treg2, treg3 ;AMX-FP8
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tdphbf8ps treg, treg2, treg3 ;AMX-FP8
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tdphf8ps treg, treg2, treg3 ;AMX-FP8
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tcvtrowd2ps zreg, treg, eax ;AMX-AVX512
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tcvtrowd2ps zreg, treg, %1 ;AMX-AVX512
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tcvtrowps2bf16h zreg, treg, eax ;AMX-AVX512
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tcvtrowps2bf16h zreg, treg, %1 ;AMX-AVX512
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tcvtrowps2bf16l zreg, treg, eax ;AMX-AVX512
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tcvtrowps2bf16l zreg, treg, %1 ;AMX-AVX512
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tcvtrowps2phh zreg, treg, eax ;AMX-AVX512
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tcvtrowps2phh zreg, treg, %1 ;AMX-AVX512
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tcvtrowps2phl zreg, treg, eax ;AMX-AVX512
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tcvtrowps2phl zreg, treg, %1 ;AMX-AVX512
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tilemovrow zreg, treg, eax ;AMX-AVX512
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tilemovrow zreg, treg, %1 ;AMX-AVX512
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t2rpntlvwz0 treg, [rax] ;AMX-TRANSPOSE
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t2rpntlvwz0 treg, [rax+rdx] ;AMX-TRANSPOSE
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t2rpntlvwz0 treg, [rax+rdx*2] ;AMX-TRANSPOSE
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t2rpntlvwz0t1 treg, [rax] ;AMX-TRANSPOSE
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t2rpntlvwz0t1 treg, [rax+rdx] ;AMX-TRANSPOSE
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t2rpntlvwz0t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE
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t2rpntlvwz1 treg, [rax] ;AMX-TRANSPOSE
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t2rpntlvwz1 treg, [rax+rdx] ;AMX-TRANSPOSE
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t2rpntlvwz1 treg, [rax+rdx*2] ;AMX-TRANSPOSE
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t2rpntlvwz1t1 treg, [rax] ;AMX-TRANSPOSE
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t2rpntlvwz1t1 treg, [rax+rdx] ;AMX-TRANSPOSE
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t2rpntlvwz1t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE
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ttransposed treg, treg ;AMX-TRANSPOSE
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t2rpntlvwz0rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz0rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz0rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz0rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz0rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz0rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz1rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz1rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz1rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz1rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz1rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
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t2rpntlvwz1rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
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ttdpbf16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-BF16
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ttdpfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-FP16
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ttcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
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ttcmmrlfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
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tconjtcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
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tconjtfp16 treg, treg ;AMX-TRANSPOSE + AMX-COMPLEX
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ttmmultf32ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX_TF32
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tilestored [rax], treg ;AMX_TILE
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tilestored [rax,rdx], treg ;AMX_TILE
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tilestored [rax,rdx*2], treg ;AMX_TILE
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tilerelease ;AMX_TILE
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%endmacro
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%assign n 0
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%assign m 1
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%assign l 2
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%rep 8
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amx n, m, l
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%assign n ((n+1) % 8)
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%assign m ((m+1) % 8)
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%assign l ((l+1) % 8)
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%endrep
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