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Add MOVSX[D] -> CBW/CWDE/CDQE optimization patterns when the suitable form of the AX register are referenced. Add MOVZX reg64,rm32 pattern which converts to a 32-bit MOV. Add MOVZXD reg64,rm32 alias pattern for consistency. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
34 lines
413 B
NASM
34 lines
413 B
NASM
bits 64
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movsx ax,al
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movsx eax,al
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movsx eax,ax
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movsx rax,al
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movsx rax,ax
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movsx rax,eax
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movsxd rax,eax
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movsx cx,cl
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movsx ecx,cl
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movsx ecx,cx
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movsx rcx,cl
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movsx rcx,cx
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movsx rcx,ecx
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movsxd rcx,ecx
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movzx ax,al
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movzx eax,al
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movzx eax,ax
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movzx rax,al
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movzx rax,ax
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movzx rax,eax
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movzxd rax,eax
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movzx cx,cl
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movzx ecx,cl
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movzx ecx,cx
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movzx rcx,cl
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movzx rcx,cx
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movzx rcx,ecx
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movzxd rcx,ecx
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