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https://github.com/netwide-assembler/nasm.git
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172c4b2342
-- AVX-VNNI_INT{,8,16} instructions: VPDP{B,W}{SS,SU,US,UU}{D,DS}
- AVX-VNNI_INT{,8,16} test files
Checked with XED version: [v2025.06.08]
64 lines
1.5 KiB
NASM
64 lines
1.5 KiB
NASM
BITS 32
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cpu latevex
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vpdpbsud xmm1, xmm2, xmm0
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vpdpbsud xmm2, xmm3, [eax]
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vpdpbsud xmm3, xmm4, [eax+0x12]
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vpdpbsud xmm4, xmm5, [eax+ebx*2]
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vpdpbsud ymm1, ymm2, ymm0
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vpdpbsud ymm2, ymm3, [eax]
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vpdpbsud ymm3, ymm4, [eax+0x12]
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vpdpbsud ymm4, ymm5, [eax+ebx*2]
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vpdpbsuds xmm1, xmm2, xmm0
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vpdpbsuds xmm2, xmm3, [eax]
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vpdpbsuds xmm3, xmm4, [eax+0x12]
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vpdpbsuds xmm4, xmm5, [eax+ebx*2]
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vpdpbsuds ymm1, ymm2, ymm0
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vpdpbsuds ymm2, ymm3, [eax]
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vpdpbsuds ymm3, ymm4, [eax+0x12]
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vpdpbsuds ymm4, ymm5, [eax+ebx*2]
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vpdpbssd xmm1, xmm2, xmm0
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vpdpbssd xmm2, xmm3, [eax]
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vpdpbssd xmm3, xmm4, [eax+0x12]
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vpdpbssd xmm4, xmm5, [eax+ebx*2]
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vpdpbssd ymm1, ymm2, ymm0
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vpdpbssd ymm2, ymm3, [eax]
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vpdpbssd ymm3, ymm4, [eax+0x12]
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vpdpbssd ymm4, ymm5, [eax+ebx*2]
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vpdpbssds xmm1, xmm2, xmm0
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vpdpbssds xmm2, xmm3, [eax]
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vpdpbssds xmm3, xmm4, [eax+0x12]
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vpdpbssds xmm4, xmm5, [eax+ebx*2]
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vpdpbssds ymm1, ymm2, ymm0
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vpdpbssds ymm2, ymm3, [eax]
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vpdpbssds ymm3, ymm4, [eax+0x12]
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vpdpbssds ymm4, ymm5, [eax+ebx*2]
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vpdpbuud xmm1, xmm2, xmm0
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vpdpbuud xmm2, xmm3, [eax]
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vpdpbuud xmm3, xmm4, [eax+0x12]
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vpdpbuud xmm4, xmm5, [eax+ebx*2]
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vpdpbuud ymm1, ymm2, ymm0
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vpdpbuud ymm2, ymm3, [eax]
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vpdpbuud ymm3, ymm4, [eax+0x12]
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vpdpbuud ymm4, ymm5, [eax+ebx*2]
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vpdpbuuds xmm1, xmm2, xmm0
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vpdpbuuds xmm2, xmm3, [eax]
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vpdpbuuds xmm3, xmm4, [eax+0x12]
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vpdpbuuds xmm4, xmm5, [eax+ebx*2]
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vpdpbuuds ymm1, ymm2, ymm0
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vpdpbuuds ymm2, ymm3, [eax]
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vpdpbuuds ymm3, ymm4, [eax+0x12]
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vpdpbuuds ymm4, ymm5, [eax+ebx*2]
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