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https://github.com/netwide-assembler/nasm.git
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172c4b2342
-- AVX-VNNI_INT{,8,16} instructions: VPDP{B,W}{SS,SU,US,UU}{D,DS}
- AVX-VNNI_INT{,8,16} test files
Checked with XED version: [v2025.06.08]
64 lines
1.5 KiB
NASM
64 lines
1.5 KiB
NASM
BITS 32
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cpu latevex
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vpdpwsud xmm1, xmm2, xmm0
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vpdpwsud xmm2, xmm3, [eax]
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vpdpwsud xmm3, xmm4, [eax+0x12]
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vpdpwsud xmm4, xmm5, [eax+ebx*2]
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vpdpwsud ymm1, ymm2, ymm0
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vpdpwsud ymm2, ymm3, [eax]
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vpdpwsud ymm3, ymm4, [eax+0x12]
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vpdpwsud ymm4, ymm5, [eax+ebx*2]
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vpdpwsuds xmm1, xmm2, xmm0
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vpdpwsuds xmm2, xmm3, [eax]
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vpdpwsuds xmm3, xmm4, [eax+0x12]
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vpdpwsuds xmm4, xmm5, [eax+ebx*2]
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vpdpwsuds ymm1, ymm2, ymm0
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vpdpwsuds ymm2, ymm3, [eax]
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vpdpwsuds ymm3, ymm4, [eax+0x12]
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vpdpwsuds ymm4, ymm5, [eax+ebx*2]
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vpdpwusd xmm1, xmm2, xmm0
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vpdpwusd xmm2, xmm3, [eax]
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vpdpwusd xmm3, xmm4, [eax+0x12]
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vpdpwusd xmm4, xmm5, [eax+ebx*2]
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vpdpwusd ymm1, ymm2, ymm0
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vpdpwusd ymm2, ymm3, [eax]
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vpdpwusd ymm3, ymm4, [eax+0x12]
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vpdpwusd ymm4, ymm5, [eax+ebx*2]
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vpdpwusds xmm1, xmm2, xmm0
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vpdpwusds xmm2, xmm3, [eax]
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vpdpwusds xmm3, xmm4, [eax+0x12]
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vpdpwusds xmm4, xmm5, [eax+ebx*2]
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vpdpwusds ymm1, ymm2, ymm0
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vpdpwusds ymm2, ymm3, [eax]
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vpdpwusds ymm3, ymm4, [eax+0x12]
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vpdpwusds ymm4, ymm5, [eax+ebx*2]
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vpdpwuud xmm1, xmm2, xmm0
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vpdpwuud xmm2, xmm3, [eax]
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vpdpwuud xmm3, xmm4, [eax+0x12]
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vpdpwuud xmm4, xmm5, [eax+ebx*2]
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vpdpwuud ymm1, ymm2, ymm0
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vpdpwuud ymm2, ymm3, [eax]
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vpdpwuud ymm3, ymm4, [eax+0x12]
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vpdpwuud ymm4, ymm5, [eax+ebx*2]
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vpdpwuuds xmm1, xmm2, xmm0
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vpdpwuuds xmm2, xmm3, [eax]
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vpdpwuuds xmm3, xmm4, [eax+0x12]
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vpdpwuuds xmm4, xmm5, [eax+ebx*2]
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vpdpwuuds ymm1, ymm2, ymm0
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vpdpwuuds ymm2, ymm3, [eax]
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vpdpwuuds ymm3, ymm4, [eax+0x12]
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vpdpwuuds ymm4, ymm5, [eax+ebx*2]
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