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e56c2dc5b7
Break the instruction processing if there are impossible combinations of Sx flags and operand sizes. If the intent is to always require explicit sizes, use the SX flag. The INSERTPS instruction pattern was explicitly wrong, the rest of these are nuisance fixes. TODO: fix the disassembler to be able to exclude patterns where these bits don't matter. Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
11 lines
242 B
NASM
11 lines
242 B
NASM
bits 64
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insertps xmm0,xmm1,16
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insertps xmm0,dword xmm1,16
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insertps xmm0,xmm1,byte 16
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insertps xmm0,dword xmm1,byte 16
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insertps xmm0,[rax],16
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insertps xmm0,dword [rax],16
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insertps xmm0,[rax],byte 16
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insertps xmm0,dword [rax],byte 16
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